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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-09-30 00:38:38 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-09-30 00:38:38 +0000
commita062e36c58738321295e1031bebb1b89a0cdf01a (patch)
tree46bc4ffc59fa6f26dd710a93cba5a18cbff9e5f2 /target-ppc/cpu.h
parent4887d78b01594d994d51db8d11c1a04e65fca032 (diff)
Implement the PowerPC alternate time-base, following the 2.04 specification.
Share most code with the time-base management routines. Remove time-base write routines from user-mode emulation environments. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3277 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r--target-ppc/cpu.h8
1 files changed, 6 insertions, 2 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 21c3061f4c..e4d12163a1 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -625,6 +625,10 @@ uint32_t cpu_ppc_load_tbl (CPUPPCState *env);
uint32_t cpu_ppc_load_tbu (CPUPPCState *env);
void cpu_ppc_store_tbu (CPUPPCState *env, uint32_t value);
void cpu_ppc_store_tbl (CPUPPCState *env, uint32_t value);
+uint32_t cpu_ppc_load_atbl (CPUPPCState *env);
+uint32_t cpu_ppc_load_atbu (CPUPPCState *env);
+void cpu_ppc_store_atbl (CPUPPCState *env, uint32_t value);
+void cpu_ppc_store_atbu (CPUPPCState *env, uint32_t value);
uint32_t cpu_ppc_load_decr (CPUPPCState *env);
void cpu_ppc_store_decr (CPUPPCState *env, uint32_t value);
#if defined(TARGET_PPC64H)
@@ -798,8 +802,8 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val);
#define SPR_BOOKE_SPEFSCR (0x200)
#define SPR_E500_BBEAR (0x201)
#define SPR_E500_BBTAR (0x202)
-#define SPR_BOOKE_ATBL (0x20E)
-#define SPR_BOOKE_ATBU (0x20F)
+#define SPR_ATBL (0x20E)
+#define SPR_ATBU (0x20F)
#define SPR_IBAT0U (0x210)
#define SPR_BOOKE_IVOR32 (0x210)
#define SPR_IBAT0L (0x211)