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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-12 01:56:18 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-12 01:56:18 +0000
commit3cd7d1ddbba67a79854ea258cdf3a07eb0ad5136 (patch)
tree5dee929d68c3c96baae508887156292d975cbe82 /target-ppc/cpu.h
parenta73666f6564e17adcae2908f7b52d42de2ff5211 (diff)
Allow use of SPE extension by all PowerPC targets,
adding gprh registers to store GPR MSBs when GPRs are 32 bits. Remove not-needed-anymore ppcemb-linux-user target. Keep ppcemb-softmmu target, which provides 1kB pages support and 36 bits physical address space. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3628 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-ppc/cpu.h')
-rw-r--r--target-ppc/cpu.h57
1 files changed, 31 insertions, 26 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 198da43f3e..a463b457c7 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -24,46 +24,51 @@
#include <inttypes.h>
#if defined (TARGET_PPC64)
+/* PowerPC 64 definitions */
typedef uint64_t ppc_gpr_t;
#define TARGET_GPR_BITS 64
#define TARGET_LONG_BITS 64
#define REGX "%016" PRIx64
#define TARGET_PAGE_BITS 12
-#elif defined(TARGET_PPCEMB)
-/* BookE have 36 bits physical address space */
-#define TARGET_PHYS_ADDR_BITS 64
-/* GPR are 64 bits: used by vector extension */
-typedef uint64_t ppc_gpr_t;
-#define TARGET_GPR_BITS 64
-#define TARGET_LONG_BITS 32
-#define REGX "%016" PRIx64
-#if defined(CONFIG_USER_ONLY)
-/* It looks like a lot of Linux programs assume page size
- * is 4kB long. This is evil, but we have to deal with it...
- */
-#define TARGET_PAGE_BITS 12
-#else
-/* Pages can be 1 kB small */
-#define TARGET_PAGE_BITS 10
-#endif
-#else
+
+#else /* defined (TARGET_PPC64) */
+/* PowerPC 32 definitions */
#if (HOST_LONG_BITS >= 64)
/* When using 64 bits temporary registers,
* we can use 64 bits GPR with no extra cost
- * It's even an optimization as it will prevent
+ * It's even an optimization as this will prevent
* the compiler to do unuseful masking in the micro-ops.
*/
typedef uint64_t ppc_gpr_t;
#define TARGET_GPR_BITS 64
#define REGX "%08" PRIx64
-#else
+#else /* (HOST_LONG_BITS >= 64) */
typedef uint32_t ppc_gpr_t;
#define TARGET_GPR_BITS 32
#define REGX "%08" PRIx32
-#endif
+#endif /* (HOST_LONG_BITS >= 64) */
+
#define TARGET_LONG_BITS 32
+
+#if defined(TARGET_PPCEMB)
+/* Specific definitions for PowerPC embedded */
+/* BookE have 36 bits physical address space */
+#define TARGET_PHYS_ADDR_BITS 64
+#if defined(CONFIG_USER_ONLY)
+/* It looks like a lot of Linux programs assume page size
+ * is 4kB long. This is evil, but we have to deal with it...
+ */
#define TARGET_PAGE_BITS 12
-#endif
+#else /* defined(CONFIG_USER_ONLY) */
+/* Pages can be 1 kB small */
+#define TARGET_PAGE_BITS 10
+#endif /* defined(CONFIG_USER_ONLY) */
+#else /* defined(TARGET_PPCEMB) */
+/* "standard" PowerPC 32 definitions */
+#define TARGET_PAGE_BITS 12
+#endif /* defined(TARGET_PPCEMB) */
+
+#endif /* defined (TARGET_PPC64) */
#include "cpu-defs.h"
@@ -166,14 +171,12 @@ enum {
POWERPC_EXCP_ITLB = 14, /* Instruction TLB error */
POWERPC_EXCP_DEBUG = 15, /* Debug interrupt */
/* Vectors 16 to 31 are reserved */
-#if defined(TARGET_PPCEMB)
POWERPC_EXCP_SPEU = 32, /* SPE/embedded floating-point unavailable */
POWERPC_EXCP_EFPDI = 33, /* Embedded floating-point data interrupt */
POWERPC_EXCP_EFPRI = 34, /* Embedded floating-point round interrupt */
POWERPC_EXCP_EPERFM = 35, /* Embedded performance monitor interrupt */
POWERPC_EXCP_DOORI = 36, /* Embedded doorbell interrupt */
POWERPC_EXCP_DOORCI = 37, /* Embedded doorbell critical interrupt */
-#endif /* defined(TARGET_PPCEMB) */
/* Vectors 38 to 63 are reserved */
/* Exceptions defined in the PowerPC server specification */
POWERPC_EXCP_RESET = 64, /* System reset exception */
@@ -527,6 +530,10 @@ struct CPUPPCState {
/* general purpose registers */
ppc_gpr_t gpr[32];
+#if TARGET_GPR_BITS < 64
+ /* Storage for GPR MSB, used by the SPE extension */
+ ppc_gpr_t gprh[32];
+#endif
/* LR */
target_ulong lr;
/* CTR */
@@ -597,12 +604,10 @@ struct CPUPPCState {
/* Altivec registers */
ppc_avr_t avr[32];
uint32_t vscr;
-#if defined(TARGET_PPCEMB)
/* SPE registers */
ppc_gpr_t spe_acc;
float_status spe_status;
uint32_t spe_fscr;
-#endif
/* Internal devices resources */
/* Time base and decrementer */