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authorPeter Maydell <peter.maydell@linaro.org>2014-09-12 19:04:17 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-10-06 14:25:43 +0100
commit2472b6c07bb50179019589af1c22f43935ab7f5c (patch)
treea9ed9fa651dc7a884600cfef65da71211eb6031f /target-mips
parent507ef2f9fab3e67ac6fefda4e20db7fc5f2bc186 (diff)
gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag
GDB assumes that watchpoint set via the gdbstub remote protocol will behave in the same way as hardware watchpoints for the target. In particular, whether the CPU stops with the PC before or after the insn which triggers the watchpoint is target dependent. Allow guest CPU code to specify which behaviour to use. This fixes a bug where with guest CPUs which stop before the accessing insn GDB would manually step forward over what it thought was the insn and end up one insn further forward than it should be. We set this flag for the CPU architectures which set gdbarch_have_nonsteppable_watchpoint in gdb 7.7: ARM, CRIS, LM32, MIPS and Xtensa. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Max Filippov <jcmvbkbc@gmail.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Michael Walle <michael@walle.cc> (for lm32) Message-id: 1410545057-14014-1-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/cpu.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-mips/cpu.c b/target-mips/cpu.c
index 5ed60f78a7..98dc94e74b 100644
--- a/target-mips/cpu.c
+++ b/target-mips/cpu.c
@@ -151,6 +151,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
#endif
cc->gdb_num_core_regs = 73;
+ cc->gdb_stop_before_watchpoint = true;
}
static const TypeInfo mips_cpu_type_info = {