diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-04-08 21:48:10 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-04-08 21:48:10 +0000 |
| commit | 4e2474d677953843ce328f83278614a5d07ee5e3 (patch) | |
| tree | 02333b83d53eded05309745d5c108a325c386848 /target-mips | |
| parent | 460f00c4e1f43cf610633e31ad4988c9ddcc415f (diff) | |
target-mips: optimize gen_flt3_ldst()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7044 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/translate.c | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index c78c7c2567..96b49a8968 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1124,7 +1124,7 @@ static void gen_flt_ldst (DisasContext *ctx, uint32_t opc, int ft, int base, int16_t offset) { const char *opn = "flt_ldst"; - TCGv t0 = tcg_temp_local_new(); + TCGv t0 = tcg_temp_new(); if (base == 0) { tcg_gen_movi_tl(t0, offset); @@ -7152,8 +7152,8 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc, { const char *opn = "extended float load/store"; int store = 0; - TCGv t0 = tcg_temp_local_new(); - TCGv t1 = tcg_temp_local_new(); + TCGv t0 = tcg_temp_new(); + TCGv t1 = tcg_temp_new(); if (base == 0) { gen_load_gpr(t0, index); @@ -7165,6 +7165,7 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc, } /* Don't do NOP if destination is zero: we must perform the actual memory access. */ + save_cpu_state(ctx, 0); switch (opc) { case OPC_LWXC1: check_cop1x(ctx); @@ -7241,12 +7242,6 @@ static void gen_flt3_ldst (DisasContext *ctx, uint32_t opc, opn = "suxc1"; store = 1; break; - default: - MIPS_INVAL(opn); - generate_exception(ctx, EXCP_RI); - tcg_temp_free(t0); - tcg_temp_free(t1); - return; } tcg_temp_free(t0); tcg_temp_free(t1); |