diff options
author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-04-13 08:53:12 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-04-13 08:53:12 +0000 |
commit | 867abc7e50500178423799f28179efef73f3f1b3 (patch) | |
tree | 77616abc6c6fbb63ebd30add6b4852f6983d2cde /target-mips | |
parent | 30a3848b7734ae2b4ddec11364f82b66b69c76d5 (diff) |
target-mips: fix commits 7040 and 7042
CPU state should also be saved for helpers that in fine call
cpu_unlink_tb(). Reported by Stefan Weil.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7096 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips')
-rw-r--r-- | target-mips/translate.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index dd236e676f..514e9896c0 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -3697,6 +3697,7 @@ static void gen_mtc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int se case 12: switch (sel) { case 0: + save_cpu_state(ctx, 1); gen_helper_mtc0_status(t0); /* BS_STOP isn't good enough here, hflags may have changed. */ gen_save_pc(ctx->pc + 4); @@ -3731,6 +3732,7 @@ static void gen_mtc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int se case 13: switch (sel) { case 0: + save_cpu_state(ctx, 1); gen_helper_mtc0_cause(t0); rn = "Cause"; break; @@ -4861,6 +4863,7 @@ static void gen_dmtc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int s case 12: switch (sel) { case 0: + save_cpu_state(ctx, 1); gen_helper_mtc0_status(t0); /* BS_STOP isn't good enough here, hflags may have changed. */ gen_save_pc(ctx->pc + 4); @@ -4895,14 +4898,13 @@ static void gen_dmtc0 (CPUState *env, DisasContext *ctx, TCGv t0, int reg, int s case 13: switch (sel) { case 0: + save_cpu_state(ctx, 1); gen_helper_mtc0_cause(t0); rn = "Cause"; break; default: goto die; } - /* Stop translation as we may have switched the execution mode */ - ctx->bstate = BS_STOP; break; case 14: switch (sel) { @@ -7972,6 +7974,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx) break; case OPC_DI: check_insn(env, ctx, ISA_MIPS32R2); + save_cpu_state(ctx, 1); gen_helper_di(t0); gen_store_gpr(t0, rt); /* Stop translation as we may have switched the execution mode */ @@ -7979,6 +7982,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx) break; case OPC_EI: check_insn(env, ctx, ISA_MIPS32R2); + save_cpu_state(ctx, 1); gen_helper_ei(t0); gen_store_gpr(t0, rt); /* Stop translation as we may have switched the execution mode */ |