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authorAndreas Färber <afaerber@suse.de>2013-08-26 21:22:53 +0200
committerAndreas Färber <afaerber@suse.de>2014-03-13 19:20:47 +0100
commitf0c3c505a8ec1a948006b3a16a35864a2270a84b (patch)
tree063bbde0e88746c0add37f139990c60369fb1aca /target-mips
parentff4700b05cfb305a880762c288b88ca01c782352 (diff)
cpu: Move breakpoints field from CPU_COMMON to CPUState
Most targets were using offsetof(CPUFooState, breakpoints) to determine how much of CPUFooState to clear on reset. Use the next field after CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise. Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/cpu.c2
-rw-r--r--target-mips/cpu.h1
-rw-r--r--target-mips/translate.c4
3 files changed, 4 insertions, 3 deletions
diff --git a/target-mips/cpu.c b/target-mips/cpu.c
index 8c304ac832..cf4d856d6b 100644
--- a/target-mips/cpu.c
+++ b/target-mips/cpu.c
@@ -83,7 +83,7 @@ static void mips_cpu_reset(CPUState *s)
mcc->parent_reset(s);
- memset(env, 0, offsetof(CPUMIPSState, breakpoints));
+ memset(env, 0, offsetof(CPUMIPSState, mvp));
tlb_flush(env, 1);
cpu_state_reset(env);
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index a1d85efea1..3ba3229e66 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -482,6 +482,7 @@ struct CPUMIPSState {
CPU_COMMON
+ /* Fields from here on are preserved across CPU reset. */
CPUMIPSMVPContext *mvp;
#if !defined(CONFIG_USER_ONLY)
CPUMIPSTLBContext *tlb;
diff --git a/target-mips/translate.c b/target-mips/translate.c
index d1c25d2b22..71dccaea55 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -15613,8 +15613,8 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
LOG_DISAS("\ntb %p idx %d hflags %04x\n", tb, ctx.mem_idx, ctx.hflags);
gen_tb_start();
while (ctx.bstate == BS_NONE) {
- if (unlikely(!QTAILQ_EMPTY(&env->breakpoints))) {
- QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
+ if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
+ QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
if (bp->pc == ctx.pc) {
save_cpu_state(&ctx, 1);
ctx.bstate = BS_BRANCH;