diff options
| author | 陳韋任 (Wei-Ren Chen) <chenwj@iis.sinica.edu.tw> | 2012-11-21 13:50:45 +0800 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2012-11-24 13:19:54 +0100 |
| commit | d132c79f6b68622e8a115327d1f60176e1816c7c (patch) | |
| tree | 5ff132fd1593515386c3df6900f41318220895d3 /target-mips | |
| parent | 44e04d3b945ba6f5cc87e65192081da4783f73fa (diff) | |
target-mips: Add comments on POOL32Axf encoding
Current QEMU MIPS POOL32AXF encoding comes from microMIPS32
and microMIPS32 DSP. Add comment here to help reading.
Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
Reviewed-by: Eric Johnson <ericj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/translate.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 8b438f8bb0..7a85d21429 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -10359,6 +10359,19 @@ enum { /* POOL32AXF encoding of minor opcode field extension */ +/* + * 1. MIPS Architecture for Programmers Volume II-B: + * The microMIPS32 Instruction Set (Revision 3.05) + * + * Table 6.5 POOL32Axf Encoding of Minor Opcode Extension Field + * + * 2. MIPS Architecture for Programmers VolumeIV-e: + * The MIPS DSP Application-Specific Extension + * to the microMIPS32 Architecture (Revision 2.34) + * + * Table 5.5 POOL32Axf Encoding of Minor Opcode Extension Field + */ + enum { /* bits 11..6 */ TEQ = 0x00, @@ -10371,6 +10384,8 @@ enum { MFC0 = 0x03, MTC0 = 0x0b, + /* begin of microMIPS32 DSP */ + /* bits 13..12 for 0x01 */ MFHI_ACC = 0x0, MFLO_ACC = 0x1, @@ -10387,6 +10402,8 @@ enum { MULT_ACC = 0x0, MULTU_ACC = 0x1, + /* end of microMIPS32 DSP */ + /* bits 15..12 for 0x2c */ SEB = 0x2, SEH = 0x3, |