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authorLeon Alrae <leon.alrae@imgtec.com>2015-01-26 16:58:57 +0000
committerLeon Alrae <leon.alrae@imgtec.com>2015-02-13 14:11:29 +0000
commit5e88759a52934a32502298f2c78c6dfaa144364b (patch)
treeb3cdf816abe0b3307e3c02b8876814b2e8da8192 /target-mips/translate.c
parentb40a1530f294b5fa4479dc3ca9bf46c269d08d87 (diff)
target-mips: pass 0 instead of -1 as rs in microMIPS LUI instruction
Using rs = -1 in gen_logic_imm() for microMIPS LUI instruction is dangerous and may bite us when implementing microMIPS R6 because in R6 AUI and LUI are distinguished by rs value. Therefore use 0 for safety. Reported-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/translate.c')
-rw-r--r--target-mips/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index b80af98593..ca51149872 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -13653,7 +13653,7 @@ static void decode_micromips32_opc (CPUMIPSState *env, DisasContext *ctx,
target. */
break;
case LUI:
- gen_logic_imm(ctx, OPC_LUI, rs, -1, imm);
+ gen_logic_imm(ctx, OPC_LUI, rs, 0, imm);
break;
case SYNCI:
/* Break the TB to be able to sync copied instructions