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authorAndreas Färber <afaerber@suse.de>2013-08-26 08:31:06 +0200
committerAndreas Färber <afaerber@suse.de>2014-03-13 19:20:46 +0100
commit27103424c40ce71053c07d8a54ef431365fa9b7f (patch)
treebec190ce2f52c17d5f5963d743f6c64af47c9240 /target-mips/op_helper.c
parent6f03bef0ffc5cd75ac5ffcca0383c489ae48108c (diff)
cpu: Move exception_index field from CPU_COMMON to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-mips/op_helper.c')
-rw-r--r--target-mips/op_helper.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index a62496cc3b..5a4a656f3d 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -38,10 +38,12 @@ static inline void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env,
int error_code,
uintptr_t pc)
{
+ CPUState *cs = CPU(mips_env_get_cpu(env));
+
if (exception < EXCP_SC) {
qemu_log("%s: %d %d\n", __func__, exception, error_code);
}
- env->exception_index = exception;
+ cs->exception_index = exception;
env->error_code = error_code;
if (pc) {
@@ -2147,11 +2149,12 @@ void tlb_fill(CPUMIPSState *env, target_ulong addr, int is_write, int mmu_idx,
uintptr_t retaddr)
{
MIPSCPU *cpu = mips_env_get_cpu(env);
+ CPUState *cs = CPU(cpu);
int ret;
- ret = mips_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx);
+ ret = mips_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
if (ret) {
- do_raise_exception_err(env, env->exception_index,
+ do_raise_exception_err(env, cs->exception_index,
env->error_code, retaddr);
}
}