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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-01-09 12:03:22 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-01-09 12:03:22 +0000 |
| commit | a139a3ad233e81c75eab9c5671934f4f79623147 (patch) | |
| tree | d988c7b76360a818d18509b717949d1bfb225531 /target-mips/exec.h | |
| parent | 05ebd537300ce858e4f98e5582d1140b0201adc6 (diff) | |
Fix typo which broke MIPS32R2 64-bit FPU support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3902 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/exec.h')
| -rw-r--r-- | target-mips/exec.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/exec.h b/target-mips/exec.h index 35e71e4a75..b612cec70f 100644 --- a/target-mips/exec.h +++ b/target-mips/exec.h @@ -258,7 +258,7 @@ static always_inline void compute_hflags(CPUState *env) if (env->CP0_Status & (1 << CP0St_FR)) env->hflags |= MIPS_HFLAG_F64; if (env->insn_flags & ISA_MIPS32R2) { - if (env->fpu->fcr0 & FCR0_F64) + if (env->fpu->fcr0 & (1 << FCR0_F64)) env->hflags |= MIPS_HFLAG_COP1X; } else if (env->insn_flags & ISA_MIPS32) { if (env->hflags & MIPS_HFLAG_64) |