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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-30 16:44:54 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-03-30 16:44:54 +0000 |
commit | 24c7b0e330fdbfcfe87f515d79e67156c57cbc4f (patch) | |
tree | 50ed71bd4fc4c3fc0e6fc5cccb222417244b5baa /target-mips/cpu.h | |
parent | e69f67b6d58f366ffaa83a0973948edd1f74b370 (diff) |
Sanitize mips exception handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2546 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/cpu.h')
-rw-r--r-- | target-mips/cpu.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index f0f3ab2d73..4fec3cc880 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -248,8 +248,6 @@ struct CPUMIPSState { #define MIPS_HFLAG_TMASK 0x007F #define MIPS_HFLAG_MODE 0x001F /* execution modes */ #define MIPS_HFLAG_UM 0x0001 /* user mode */ -#define MIPS_HFLAG_ERL 0x0002 /* Error mode */ -#define MIPS_HFLAG_EXL 0x0004 /* Exception mode */ #define MIPS_HFLAG_DM 0x0008 /* Debug mode */ #define MIPS_HFLAG_SM 0x0010 /* Supervisor mode */ #define MIPS_HFLAG_RE 0x0040 /* Reversed endianness */ |