diff options
| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-28 17:14:10 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-28 17:14:10 +0000 |
| commit | ce5232c5c281552039466be5eadf93a712eb7611 (patch) | |
| tree | 4f39afe8e12ef9743d4bb9ba11f80c4358b76bf4 /target-mips/cpu.h | |
| parent | d377440d7401bec1b61d12f2103df378eea995e1 (diff) | |
moved halted field to CPU_COMMON
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/cpu.h')
| -rw-r--r-- | target-mips/cpu.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 31d54e4f83..cb12b3c28b 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -449,8 +449,6 @@ struct CPUMIPSState { target_ulong btarget; /* Jump / branch target */ int bcond; /* Branch condition (if needed) */ - int halted; /* TRUE if the CPU is in suspend state */ - int SYNCI_Step; /* Address step size for SYNCI */ int CCRes; /* Cycle count resolution/divisor */ uint32_t CP0_Status_rw_bitmask; /* Read/write bits in CP0_Status */ |