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| author | Anthony Liguori <aliguori@us.ibm.com> | 2013-06-28 11:48:09 -0500 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-06-28 11:48:09 -0500 |
| commit | 8a9c98aedc1a3fb4dfbebeccc926e273df54f2ba (patch) | |
| tree | b800dd8b6131717bf397103ec4d7199f67ea0c5c /target-mips/cpu.c | |
| parent | 36125631e79d53ffb9365740f43f386e2171d116 (diff) | |
| parent | c658b94f6e8c206c59d02aa6fbac285b86b53d2c (diff) | |
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
# By Andreas Färber
# Via Andreas Färber
* afaerber/qom-cpu: (24 commits)
cpu: Turn cpu_unassigned_access() into a CPUState hook
hwaddr: Make hwaddr type usable beyond softmmu
cpu: Change qemu_init_vcpu() argument to CPUState
cpus: Change qemu_dummy_start_vcpu() argument to CPUState
cpus: Change qemu_kvm_start_vcpu() argument to CPUState
cpus: Change cpu_handle_guest_debug() argument to CPUState
gdbstub: Set gdb_set_stop_cpu() argument to CPUState
kvm: Change kvm_cpu_exec() argument to CPUState
kvm: Change kvm_handle_internal_error() argument to CPUState
cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks
cpus: Change qemu_kvm_init_cpu_signals() argument to CPUState
kvm: Change kvm_set_signal_mask() argument to CPUState
cpus: Change qemu_kvm_wait_io_event() argument to CPUState
cpus: Change cpu_thread_is_idle() argument to CPUState
cpu: Change cpu_exit() argument to CPUState
kvm: Change cpu_synchronize_state() argument to CPUState
kvm: Change kvm_cpu_synchronize_state() argument to CPUState
gdbstub: Simplify find_cpu()
cpu: Guard cpu_{save,load}() definitions
target-openrisc: Register VMStateDescription for OpenRISCCPU
...
Diffstat (limited to 'target-mips/cpu.c')
| -rw-r--r-- | target-mips/cpu.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-mips/cpu.c b/target-mips/cpu.c index 5315f7bda0..b61e207317 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -48,7 +48,6 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev); cpu_reset(CPU(cpu)); - qemu_init_vcpu(&cpu->env); mcc->parent_realize(dev, errp); } @@ -80,6 +79,8 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->reset = mips_cpu_reset; cc->do_interrupt = mips_cpu_do_interrupt; + cc->dump_state = mips_cpu_dump_state; + cpu_class_set_do_unassigned_access(cc, mips_cpu_unassigned_access); } static const TypeInfo mips_cpu_type_info = { |