diff options
| author | Richard Henderson <rth@twiddle.net> | 2015-09-17 15:58:10 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-10-07 20:36:28 +1100 |
| commit | b933066ae03d924a92b2616b4a24e7d91cd5b841 (patch) | |
| tree | a5475afc2a27a25b4f91c8376d68daec05183e2e /target-microblaze | |
| parent | 959082fc4a93a016a6b697e1e0c2b373d8a3a373 (diff) | |
target-*: Introduce and use cpu_breakpoint_test
Reduce the boilerplate required for each target. At the same time,
move the test for breakpoint after calling tcg_gen_insn_start.
Note that arm and aarch64 do not use cpu_breakpoint_test, but still
move the inline test down after tcg_gen_insn_start.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-microblaze')
| -rw-r--r-- | target-microblaze/translate.c | 36 |
1 files changed, 13 insertions, 23 deletions
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index a25b042567..1224456662 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -1626,21 +1626,6 @@ static inline void decode(DisasContext *dc, uint32_t ir) } } -static void check_breakpoint(CPUMBState *env, DisasContext *dc) -{ - CPUState *cs = CPU(mb_env_get_cpu(env)); - CPUBreakpoint *bp; - - if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) { - QTAILQ_FOREACH(bp, &cs->breakpoints, entry) { - if (bp->pc == dc->pc) { - t_gen_raise_exception(dc, EXCP_DEBUG); - dc->is_jmp = DISAS_UPDATE; - } - } - } -} - /* generate intermediate code for basic block 'tb'. */ static inline void gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb, @@ -1695,14 +1680,6 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb, gen_tb_start(tb); do { -#if SIM_COMPAT - if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { - tcg_gen_movi_tl(cpu_SR[SR_PC], dc->pc); - gen_helper_debug(); - } -#endif - check_breakpoint(env, dc); - if (search_pc) { j = tcg_op_buf_count(); if (lj < j) { @@ -1717,6 +1694,19 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb, tcg_gen_insn_start(dc->pc); num_insns++; +#if SIM_COMPAT + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { + tcg_gen_movi_tl(cpu_SR[SR_PC], dc->pc); + gen_helper_debug(); + } +#endif + + if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) { + t_gen_raise_exception(dc, EXCP_DEBUG); + dc->is_jmp = DISAS_UPDATE; + break; + } + /* Pretty disas. */ LOG_DIS("%8.8x:\t", dc->pc); |