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author | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2012-01-10 10:17:21 +0100 |
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committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2012-01-12 13:54:16 +0100 |
commit | 48b5e96f0f7006f46a7d6c6f0934a6acdda22e3b (patch) | |
tree | 87714ec1e00a6c0e51c83f767ad5ead5656d43a4 /target-microblaze/translate.c | |
parent | 2355c16e74ffa4d14e7fc2b4a23b055565ac0221 (diff) |
microblaze: Add support for the clz insn
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'target-microblaze/translate.c')
-rw-r--r-- | target-microblaze/translate.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index d7f513d34d..f4e6f3011b 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -809,6 +809,17 @@ static void dec_bit(DisasContext *dc) return; } break; + case 0xe0: + if ((dc->tb_flags & MSR_EE_FLAG) + && (dc->env->pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK) + && !((dc->env->pvr.regs[2] & PVR2_USE_PCMP_INSTR))) { + tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP); + t_gen_raise_exception(dc, EXCP_HW_EXCP); + } + if (dc->env->pvr.regs[2] & PVR2_USE_PCMP_INSTR) { + gen_helper_clz(cpu_R[dc->rd], cpu_R[dc->ra]); + } + break; default: cpu_abort(dc->env, "unknown bit oc=%x op=%x rd=%d ra=%d rb=%d\n", dc->pc, op, dc->rd, dc->ra, dc->rb); |