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authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>2012-11-08 14:01:19 +1000
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2012-11-08 17:42:45 +0100
commitb8c6a5d9d0ab426c1626cd6c228b09b9529dba31 (patch)
tree70820f833f4f7a3f2c35395539767775cb08fe1b /target-microblaze/translate.c
parent2592c59a66d456fe98fe96cb5787b356c40ee66f (diff)
microblaze: translate.c: Fix swaph decoding
The swaph instruction was not decoding correctly. s/1e1/1e2 on the 9 LSBs on the instruction decode. Reported-by: David Holsgrove <david.holsgrove@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'target-microblaze/translate.c')
-rw-r--r--target-microblaze/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 7d864b1dac..6f27c24b76 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -840,7 +840,7 @@ static void dec_bit(DisasContext *dc)
LOG_DIS("swapb r%d r%d\n", dc->rd, dc->ra);
tcg_gen_bswap32_i32(cpu_R[dc->rd], cpu_R[dc->ra]);
break;
- case 0x1e1:
+ case 0x1e2:
/*swaph */
LOG_DIS("swaph r%d r%d\n", dc->rd, dc->ra);
tcg_gen_rotri_i32(cpu_R[dc->rd], cpu_R[dc->ra], 16);