aboutsummaryrefslogtreecommitdiff
path: root/target-microblaze/translate.c
diff options
context:
space:
mode:
authorEdgar E. Iglesias <edgar.iglesias@petalogix.com>2011-08-25 16:41:19 +1000
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2011-08-25 22:44:25 +0200
commit8a84fc6bf7cd9de567a13ced6cd4f481274f006d (patch)
treea2ab04fddb4df57bff4185249c352c720b922cd8 /target-microblaze/translate.c
parent97b833c5df820acc5c7b3e63c84059857c115c45 (diff)
microblaze: Add an MSR_PVR constant and use it.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
Diffstat (limited to 'target-microblaze/translate.c')
-rw-r--r--target-microblaze/translate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 15f1fe5cf0..366fd3e607 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -429,8 +429,8 @@ static inline void msr_write(DisasContext *dc, TCGv v)
t = tcg_temp_new();
dc->cpustate_changed = 1;
/* PVR bit is not writable. */
- tcg_gen_andi_tl(t, v, ~(1 << 10));
- tcg_gen_andi_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], (1 << 10));
+ tcg_gen_andi_tl(t, v, ~MSR_PVR);
+ tcg_gen_andi_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], MSR_PVR);
tcg_gen_or_tl(cpu_SR[SR_MSR], cpu_SR[SR_MSR], v);
tcg_temp_free(t);
}