diff options
| author | Richard Henderson <rth@twiddle.net> | 2012-09-24 14:55:47 -0700 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2012-09-27 21:38:50 +0200 |
| commit | fdefe51c288866b98e62663fa18c8af1d66bf5f6 (patch) | |
| tree | 5560732a1024bda244f79a515e6097ae87ffc9d1 /target-cris/translate.c | |
| parent | 6673f47da21718d07346b0f3725f0dbf0d6d8e45 (diff) | |
Emit debug_insn for CPU_LOG_TB_OP_OPT as well.
For all targets that currently call tcg_gen_debug_insn_start,
add CPU_LOG_TB_OP_OPT to the condition that gates it.
This is useful for comparing optimization dumps, when the
pre-optimization dump is merely noise.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-cris/translate.c')
| -rw-r--r-- | target-cris/translate.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-cris/translate.c b/target-cris/translate.c index 19144b5e29..755de659df 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -3074,8 +3074,9 @@ static unsigned int crisv32_decoder(CPUCRISState *env, DisasContext *dc) int insn_len = 2; int i; - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { tcg_gen_debug_insn_start(dc->pc); + } /* Load a halfword onto the instruction register. */ dc->ir = cris_fetch(env, dc, dc->pc, 2, 0); |