diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2015-05-29 11:28:50 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-05-29 11:28:50 +0100 |
| commit | f2932df777dace044719dc2f394f5a5a8aa1b1cd (patch) | |
| tree | 74a74d8be50f83bcba1b967a71da7e40e180f39b /target-arm | |
| parent | e3b1d480995f6e2e86ef062038e618c1234dbcf1 (diff) | |
target-arm: Set correct syndrome for faults on MSR DAIF*, imm
If the SCTLR.UMA trap bit is set then attempts by EL0 to update
the PSTATE DAIF bits via "MSR DAIFSet, imm" and "MSR DAIFClr, imm"
instructions will raise an exception. We were failing to set
the syndrome information for this exception, which meant that
it would be reported as a repeat of whatever the previous
exception was. Set the correct syndrome information.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/op_helper.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 43e345758b..906b39fe06 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -381,6 +381,9 @@ void HELPER(msr_i_pstate)(CPUARMState *env, uint32_t op, uint32_t imm) */ if (arm_current_el(env) == 0 && !(env->cp15.sctlr_el[1] & SCTLR_UMA)) { env->exception.target_el = exception_target_el(env); + env->exception.syndrome = syn_aa64_sysregtrap(0, extract32(op, 0, 3), + extract32(op, 3, 3), 4, + imm, 0x1f, 0); raise_exception(env, EXCP_UDEF); } |