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authorRichard Henderson <rth@twiddle.net>2015-08-29 12:37:33 -0700
committerRichard Henderson <rth@twiddle.net>2015-10-07 20:36:26 +1100
commit765b842adec4c5a359e69ca08785553599f71496 (patch)
treecb87b4e8a3ad9f88148a4d743dee3d62483544ce /target-arm
parent5fdb4671b08e0d1631447e81348b2b50a6b85bf7 (diff)
tcg: Rename debug_insn_start to insn_start
With an eye toward making it mandatory. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/translate-a64.c2
-rw-r--r--target-arm/translate.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index ec0936cf97..a618711b64 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -11109,7 +11109,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
}
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
- tcg_gen_debug_insn_start(dc->pc);
+ tcg_gen_insn_start(dc->pc);
}
if (dc->ss_active && !dc->pstate_ss) {
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 84a21ace54..b521fc86f8 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -11353,7 +11353,7 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
gen_io_start();
if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
- tcg_gen_debug_insn_start(dc->pc);
+ tcg_gen_insn_start(dc->pc);
}
if (dc->ss_active && !dc->pstate_ss) {