diff options
| author | Alex Bennée <alex.bennee@linaro.org> | 2014-03-17 16:31:47 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-03-17 16:31:47 +0000 |
| commit | cf4ab1af296b8ef5d5a1dc65fda804b88ddd0553 (patch) | |
| tree | bb95ebaf63b6f232902e285176b93279e5fca302 /target-arm | |
| parent | a984e42c916ad5afdf3f8660f284857547943aa4 (diff) | |
target-arm: A64: Fix bug in add_sub_ext handling of rn
rn == 31 always means SP (not XZR) whether an add_sub_ext
instruction is setting the flags or not; only rd has behaviour
dependent on whether we are setting flags.
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-3-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/translate-a64.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 37252b7479..444dd8504d 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -3096,12 +3096,11 @@ static void disas_add_sub_ext_reg(DisasContext *s, uint32_t insn) /* non-flag setting ops may use SP */ if (!setflags) { - tcg_rn = read_cpu_reg_sp(s, rn, sf); tcg_rd = cpu_reg_sp(s, rd); } else { - tcg_rn = read_cpu_reg(s, rn, sf); tcg_rd = cpu_reg(s, rd); } + tcg_rn = read_cpu_reg_sp(s, rn, sf); tcg_rm = read_cpu_reg(s, rm, sf); ext_and_shift_reg(tcg_rm, tcg_rm, option, imm3); |