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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-03-19 14:47:40 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-03-19 14:47:40 +0000
commit8294eba18726b897c6a497b36ecd74a793f90523 (patch)
tree21b8d8a1e19a3e6be69dd6d7ad6ba10b0c6729ac /target-arm
parentee999a8899ba8c6326cda4e2e70bb52b284cf7bb (diff)
SPARC host fixes, by Ben Taylor.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/exec.h8
1 files changed, 1 insertions, 7 deletions
diff --git a/target-arm/exec.h b/target-arm/exec.h
index deba89304c..e73e12dc5c 100644
--- a/target-arm/exec.h
+++ b/target-arm/exec.h
@@ -17,19 +17,13 @@
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+#include "config.h"
#include "dyngen-exec.h"
-#if defined(__sparc__)
-struct CPUARMState *env;
-uint32_t T0;
-uint32_t T1;
-uint32_t T2;
-#else
register struct CPUARMState *env asm(AREG0);
register uint32_t T0 asm(AREG1);
register uint32_t T1 asm(AREG2);
register uint32_t T2 asm(AREG3);
-#endif
/* TODO: Put these in FP regs on targets that have such things. */
/* It is ok for FT0s and FT0d to overlap. Likewise FT1s and FT1d. */