diff options
author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-09-30 20:34:21 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-09-30 20:34:21 +0000 |
commit | 2c0262afa75d7d6cb68217f9a7587170ed3cd5b3 (patch) | |
tree | 4f8130ebaf041129d5aabede251eb87f3a1fa559 /target-arm/op_template.h | |
parent | 196ad10903ee4c2148f296600f537d7028ea845d (diff) |
new directory structure
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@385 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/op_template.h')
-rw-r--r-- | target-arm/op_template.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/target-arm/op_template.h b/target-arm/op_template.h new file mode 100644 index 0000000000..00e9d51fef --- /dev/null +++ b/target-arm/op_template.h @@ -0,0 +1,48 @@ +/* + * ARM micro operations (templates for various register related + * operations) + * + * Copyright (c) 2003 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +void OPPROTO glue(op_movl_T0_, REGNAME)(void) +{ + T0 = REG; +} + +void OPPROTO glue(op_movl_T1_, REGNAME)(void) +{ + T1 = REG; +} + +void OPPROTO glue(op_movl_T2_, REGNAME)(void) +{ + T2 = REG; +} + +void OPPROTO glue(glue(op_movl_, REGNAME), _T0)(void) +{ + REG = T0; +} + +void OPPROTO glue(glue(op_movl_, REGNAME), _T1)(void) +{ + REG = T1; +} + +#undef REG +#undef REGNAME |