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authorBlue Swirl <blauwirbel@gmail.com>2011-07-13 12:44:15 +0000
committerBlue Swirl <blauwirbel@gmail.com>2011-07-30 09:41:14 +0000
commit3e4571724fb92c77de81d8b54957de8232be6706 (patch)
tree22ed3dd4f120e05ecef8e946fe79ea8b8b27c72c /target-arm/op_helper.c
parent104bf02eb50e080ac9d0de5905f80f9a09730154 (diff)
exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h to target-*/op_helper.c. Move also various other stuff only used in op_helper.c there. Define global env in dyngen-exec.h. For i386, move wrappers for segment and FPU helpers from user-exec.c to op_helper.c. Implement raise_exception_err_env() to handle dynamic CPUState. Move the function declarations to cpu.h since they can be used outside of op_helper.c context. LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and env_to_regs(). ARM: make raise_exception() static. Convert #include "exec.h" to #include "cpu.h" #include "dyngen-exec.h" and remove now unused target-*/exec.h. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'target-arm/op_helper.c')
-rw-r--r--target-arm/op_helper.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index 46358844c5..57e4977cff 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -16,17 +16,20 @@
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#include "exec.h"
+#include "cpu.h"
+#include "dyngen-exec.h"
#include "helper.h"
#define SIGNBIT (uint32_t)0x80000000
#define SIGNBIT64 ((uint64_t)1 << 63)
-void raise_exception(int tt)
+#if !defined(CONFIG_USER_ONLY)
+static void raise_exception(int tt)
{
env->exception_index = tt;
cpu_loop_exit(env);
}
+#endif
uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def,
uint32_t rn, uint32_t maxindex)
@@ -52,6 +55,8 @@ uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def,
#if !defined(CONFIG_USER_ONLY)
+#include "softmmu_exec.h"
+
#define MMUSUFFIX _mmu
#define SHIFT 0