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| author | Alex Bennée <alex.bennee@linaro.org> | 2014-02-20 10:35:49 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-02-20 10:35:49 +0000 |
| commit | 8908f4d1850dbfd0de442e8deaed2f41821cdb89 (patch) | |
| tree | 66a555d19c9f60e28e50c3005be82d6d059e7432 /target-arm/helper-a64.h | |
| parent | b033cd3d0021bee24931d0118fbd34e8c8d8b5af (diff) | |
target-arm: A64: Implement SIMD FP compare and set insns
This adds all forms of the SIMD floating point and set instructions:
FCM(GT|GE|EQ|LE|LT)
Most of the heavy lifting is done by either the existing neon helpers or
some new helpers for the 64bit double cases. Most of the code paths are
common although the 2misc versions are a little special as they compare
against zero.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
[PMM: fixed some minor bugs, added the 2-misc-scalar encoding]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-arm/helper-a64.h')
| -rw-r--r-- | target-arm/helper-a64.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target-arm/helper-a64.h b/target-arm/helper-a64.h index 84310e874b..bf20466f50 100644 --- a/target-arm/helper-a64.h +++ b/target-arm/helper-a64.h @@ -29,3 +29,6 @@ DEF_HELPER_3(vfp_cmped_a64, i64, f64, f64, ptr) DEF_HELPER_FLAGS_5(simd_tbl, TCG_CALL_NO_RWG_SE, i64, env, i64, i64, i32, i32) DEF_HELPER_FLAGS_3(vfp_mulxs, TCG_CALL_NO_RWG, f32, f32, f32, ptr) DEF_HELPER_FLAGS_3(vfp_mulxd, TCG_CALL_NO_RWG, f64, f64, f64, ptr) +DEF_HELPER_FLAGS_3(neon_ceq_f64, TCG_CALL_NO_RWG, i64, i64, i64, ptr) +DEF_HELPER_FLAGS_3(neon_cge_f64, TCG_CALL_NO_RWG, i64, i64, i64, ptr) +DEF_HELPER_FLAGS_3(neon_cgt_f64, TCG_CALL_NO_RWG, i64, i64, i64, ptr) |