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authorPeter Maydell <peter.maydell@linaro.org>2014-03-17 16:31:53 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-03-17 16:31:53 +0000
commit5553955eb6ec890f324a2ff6c6cc1365b98b981f (patch)
treed17b9d97dff33b004c050cc155366b70566fbf13 /target-arm/helper-a64.h
parent5201c13654c35e5e0173a9947848f3a9f9a5a8bc (diff)
target-arm: A64: Implement FCVTXN
Implement the FCVTXN operation, which does a narrowing fp precision conversion using the "round to odd" (von Neumann) mode. This can conveniently be implemented as "do operation using round to zero; then set the LSB of the mantissa to 1 if the Inexact flag was set". Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-24-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm/helper-a64.h')
-rw-r--r--target-arm/helper-a64.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/helper-a64.h b/target-arm/helper-a64.h
index 8cbc3492d4..3f05bedcca 100644
--- a/target-arm/helper-a64.h
+++ b/target-arm/helper-a64.h
@@ -45,3 +45,4 @@ DEF_HELPER_FLAGS_1(neon_addlp_s16, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_FLAGS_1(neon_addlp_u16, TCG_CALL_NO_RWG_SE, i64, i64)
DEF_HELPER_FLAGS_2(frecpx_f64, TCG_CALL_NO_RWG, f64, f64, ptr)
DEF_HELPER_FLAGS_2(frecpx_f32, TCG_CALL_NO_RWG, f32, f32, ptr)
+DEF_HELPER_FLAGS_2(fcvtx_f64_to_f32, TCG_CALL_NO_RWG, f32, f64, env)