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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-10 15:15:54 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-10 15:15:54 +0000
commitaaed909a495e78364abc6812df672d2e764961a8 (patch)
tree704ab4280f250fa310bee6a3d0ba94e5417daef3 /target-alpha
parent7d77bf200682ed8cbd0c94bdfbac64dc4b23b149 (diff)
added cpu_model parameter to cpu_init()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-alpha')
-rw-r--r--target-alpha/cpu.h2
-rw-r--r--target-alpha/translate.c3
2 files changed, 3 insertions, 2 deletions
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index d65ccdea5b..f8bbc70d7b 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -396,7 +396,7 @@ enum {
IR_ZERO = 31,
};
-CPUAlphaState * cpu_alpha_init (void);
+CPUAlphaState * cpu_alpha_init (const char *cpu_model);
int cpu_alpha_exec(CPUAlphaState *s);
/* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 6f224b0162..01e6ded123 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -2095,7 +2095,7 @@ int gen_intermediate_code_pc (CPUState *env, struct TranslationBlock *tb)
return gen_intermediate_code_internal(env, tb, 1);
}
-CPUAlphaState * cpu_alpha_init (void)
+CPUAlphaState * cpu_alpha_init (const char *cpu_model)
{
CPUAlphaState *env;
uint64_t hwpcb;
@@ -2133,3 +2133,4 @@ CPUAlphaState * cpu_alpha_init (void)
return env;
}
+