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authorAndrey Smirnov <andrew.smirnov@gmail.com>2018-03-09 17:09:43 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-03-09 17:09:43 +0000
commit757282ada8c64e233825d7e2ef1d8841fdf590fc (patch)
tree31ed182ebdf8a2477c130a7190ed856ebb61ed75 /qemu.sasl
parentd64e5eabc4c7e20cc8d242545c02198b82e223ca (diff)
i.MX: Add i.MX7 SOC implementation.
The following interfaces are partially or fully emulated: * up to 2 Cortex A9 cores (SMP works with PSCI) * A7 MPCORE (identical to A15 MPCORE) * 4 GPTs modules * 7 GPIO controllers * 2 IOMUXC controllers * 1 CCM module * 1 SVNS module * 1 SRC module * 1 GPCv2 controller * 4 eCSPI controllers * 4 I2C controllers * 7 i.MX UART controllers * 2 FlexCAN controllers * 2 Ethernet controllers (FEC) * 3 SD controllers (USDHC) * 4 WDT modules * 1 SDMA module * 1 GPR module * 2 USBMISC modules * 2 ADC modules * 1 PCIe controller Tested to boot and work with upstream Linux (4.13+) guest. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> [PMM: folded a couple of long lines] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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