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authoraliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-17 21:35:49 +0000
committeraliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-17 21:35:49 +0000
commitca7b25e3ab8a49e46484bd436fedf72940f02887 (patch)
tree95dc7c17f4dde8450d75f790a4fa7f97ece5ba78 /pc-bios/bios.diff
parent44d3749c0214d8b386e5f1899a191707807ef195 (diff)
Update to the latest Bochs BIOS
Update the PC BIOS to the latest version, split out the patches into patch series, and update the README to point to the new location of the Bochs BIOS source tree. Also update the gitignore to allow the patch queue directory to be used. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6077 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'pc-bios/bios.diff')
-rw-r--r--pc-bios/bios.diff145
1 files changed, 0 insertions, 145 deletions
diff --git a/pc-bios/bios.diff b/pc-bios/bios.diff
deleted file mode 100644
index da510db803..0000000000
--- a/pc-bios/bios.diff
+++ /dev/null
@@ -1,145 +0,0 @@
---- bochs-2.3.7.orig/bios/rombios.h
-+++ bochs-2.3.7/bios/rombios.h
-@@ -19,7 +19,7 @@
- // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
-
- /* define it to include QEMU specific code */
--//#define BX_QEMU
-+#define BX_QEMU
-
- #ifndef LEGACY
- # define BX_ROMBIOS32 1
---- bochs-2.3.7.orig/bios/rombios.c
-+++ bochs-2.3.7/bios/rombios.c
-@@ -4404,22 +4404,25 @@
- #endif // BX_USE_PS2_MOUSE
-
-
--void set_e820_range(ES, DI, start, end, type)
-+void set_e820_range(ES, DI, start, end, extra_start, extra_end, type)
- Bit16u ES;
- Bit16u DI;
- Bit32u start;
- Bit32u end;
-+ Bit8u extra_start;
-+ Bit8u extra_end;
- Bit16u type;
- {
- write_word(ES, DI, start);
- write_word(ES, DI+2, start >> 16);
-- write_word(ES, DI+4, 0x00);
-+ write_word(ES, DI+4, extra_start);
- write_word(ES, DI+6, 0x00);
-
- end -= start;
-+ extra_end -= extra_start;
- write_word(ES, DI+8, end);
- write_word(ES, DI+10, end >> 16);
-- write_word(ES, DI+12, 0x0000);
-+ write_word(ES, DI+12, extra_end);
- write_word(ES, DI+14, 0x0000);
-
- write_word(ES, DI+16, type);
-@@ -4432,7 +4435,9 @@
- Bit16u ES, DS, FLAGS;
- {
- Bit32u extended_memory_size=0; // 64bits long
-+ Bit32u extra_lowbits_memory_size=0;
- Bit16u CX,DX;
-+ Bit8u extra_highbits_memory_size=0;
-
- BX_DEBUG_INT15("int15 AX=%04x\n",regs.u.r16.ax);
-
-@@ -4506,11 +4511,18 @@
- extended_memory_size += (1L * 1024 * 1024);
- }
-
-+ extra_lowbits_memory_size = inb_cmos(0x5c);
-+ extra_lowbits_memory_size <<= 8;
-+ extra_lowbits_memory_size |= inb_cmos(0x5b);
-+ extra_lowbits_memory_size *= 64;
-+ extra_lowbits_memory_size *= 1024;
-+ extra_highbits_memory_size = inb_cmos(0x5d);
-+
- switch(regs.u.r16.bx)
- {
- case 0:
- set_e820_range(ES, regs.u.r16.di,
-- 0x0000000L, 0x0009fc00L, 1);
-+ 0x0000000L, 0x0009fc00L, 0, 0, 1);
- regs.u.r32.ebx = 1;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
-@@ -4519,7 +4531,7 @@
- break;
- case 1:
- set_e820_range(ES, regs.u.r16.di,
-- 0x0009fc00L, 0x000a0000L, 2);
-+ 0x0009fc00L, 0x000a0000L, 0, 0, 2);
- regs.u.r32.ebx = 2;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
-@@ -4528,7 +4540,7 @@
- break;
- case 2:
- set_e820_range(ES, regs.u.r16.di,
-- 0x000e8000L, 0x00100000L, 2);
-+ 0x000e8000L, 0x00100000L, 0, 0, 2);
- regs.u.r32.ebx = 3;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
-@@ -4539,7 +4551,7 @@
- #if BX_ROMBIOS32
- set_e820_range(ES, regs.u.r16.di,
- 0x00100000L,
-- extended_memory_size - ACPI_DATA_SIZE, 1);
-+ extended_memory_size - ACPI_DATA_SIZE ,0, 0, 1);
- regs.u.r32.ebx = 4;
- #else
- set_e820_range(ES, regs.u.r16.di,
-@@ -4555,7 +4567,7 @@
- case 4:
- set_e820_range(ES, regs.u.r16.di,
- extended_memory_size - ACPI_DATA_SIZE,
-- extended_memory_size, 3); // ACPI RAM
-+ extended_memory_size ,0, 0, 3); // ACPI RAM
- regs.u.r32.ebx = 5;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
-@@ -4565,7 +4577,20 @@
- case 5:
- /* 256KB BIOS area at the end of 4 GB */
- set_e820_range(ES, regs.u.r16.di,
-- 0xfffc0000L, 0x00000000L, 2);
-+ 0xfffc0000L, 0x00000000L ,0, 0, 2);
-+ if (extra_highbits_memory_size || extra_lowbits_memory_size)
-+ regs.u.r32.ebx = 6;
-+ else
-+ regs.u.r32.ebx = 0;
-+ regs.u.r32.eax = 0x534D4150;
-+ regs.u.r32.ecx = 0x14;
-+ CLEAR_CF();
-+ return;
-+ case 6:
-+ /* Maping of memory above 4 GB */
-+ set_e820_range(ES, regs.u.r16.di, 0x00000000L,
-+ extra_lowbits_memory_size, 1, extra_highbits_memory_size
-+ + 1, 1);
- regs.u.r32.ebx = 0;
- regs.u.r32.eax = 0x534D4150;
- regs.u.r32.ecx = 0x14;
---- bochs-2.3.7.orig/bios/rombios32.c
-+++ bochs-2.3.7/bios/rombios32.c
-@@ -479,7 +479,12 @@
- sipi_vector = AP_BOOT_ADDR >> 12;
- writel(APIC_BASE + APIC_ICR_LOW, 0x000C4600 | sipi_vector);
-
-+#ifndef BX_QEMU
- delay_ms(10);
-+#else
-+ while (cmos_readb(0x5f) + 1 != readw((void *)CPU_COUNT_ADDR))
-+ ;
-+#endif
-
- smp_cpus = readw((void *)CPU_COUNT_ADDR);
- }