ioport: use uint{32, 16, 8}_t for ioport value and pio_addr_t for ioport address.

Using int for cpu_{in, out}[bwl] is inconsistent with other part
because for address or value, uintN_t is used by other qemu part.
At least, softmmu, CPU{Read, Write}MemoryFunc, pci, target_phys_addr_t
and the callers of cpu_{in, out}[bwl]().
This patch removes the inconsistency.

IO port has its own address space so define pio_addr_t as uint32_t
because PCI io space width is 32bit.
And use uint{32, 16, 8}_t for ioport value.
Changing signedness of value might cause subtle issue. However
only a suspicious caller is kvm_handle_io() which is ok. And other callers
pass unsigned value in the first place.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Stuart Brady <sdbrady@ntlworld.com>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: Samuel Thibault <samuel.thibault@gnu.org>
Cc: Tristan Gingold <gingold@adacore.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>

1 files changed, 15 insertions, 12 deletions

diff --git a/ioport-user.c b/ioport-user.c
index 9f13e1043b..11c76c7631 100644
--- a/ioport-user.c
+++ b/ioport-user.c
@@ -23,35 +23,38 @@
 #include "qemu-common.h"
 #include "ioport.h"
 
-void cpu_outb(CPUState *env, int addr, int val)
+void cpu_outb(CPUState *env, pio_addr_t addr, uint8_t val)
 {
-    fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
+    fprintf(stderr, "outb: port=0x%04"FMT_pioaddr", data=%02"PRIx8"\n",
+            addr, val);
 }
 
-void cpu_outw(CPUState *env, int addr, int val)
+void cpu_outw(CPUState *env, pio_addr_t addr, uint16_t val)
 {
-    fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
+    fprintf(stderr, "outw: port=0x%04"FMT_pioaddr", data=%04"PRIx16"\n",
+            addr, val);
 }
 
-void cpu_outl(CPUState *env, int addr, int val)
+void cpu_outl(CPUState *env, pio_addr_t addr, uint32_t val)
 {
-    fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
+    fprintf(stderr, "outl: port=0x%04"FMT_pioaddr", data=%08"PRIx32"\n",
+            addr, val);
 }
 
-int cpu_inb(CPUState *env, int addr)
+uint8_t cpu_inb(CPUState *env, pio_addr_t addr)
 {
-    fprintf(stderr, "inb: port=0x%04x\n", addr);
+    fprintf(stderr, "inb: port=0x%04"FMT_pioaddr"\n", addr);
     return 0;
 }
 
-int cpu_inw(CPUState *env, int addr)
+uint16_t cpu_inw(CPUState *env, pio_addr_t addr)
 {
-    fprintf(stderr, "inw: port=0x%04x\n", addr);
+    fprintf(stderr, "inw: port=0x%04"FMT_pioaddr"\n", addr);
     return 0;
 }
 
-int cpu_inl(CPUState *env, int addr)
+uint32_t cpu_inl(CPUState *env, pio_addr_t addr)
 {
-    fprintf(stderr, "inl: port=0x%04x\n", addr);
+    fprintf(stderr, "inl: port=0x%04"FMT_pioaddr"\n", addr);
     return 0;
 }