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authorqianfan Zhao <qianfanguijin@163.com>2023-06-06 10:19:32 +0100
committerPeter Maydell <peter.maydell@linaro.org>2023-06-06 10:19:32 +0100
commit44814e210acb589bfdab073b3bed3a6d9a306ca3 (patch)
tree9530bb72945632d443c1c655cb69a94386438935 /include
parentd1e409c5831b2f48b285a4d00f84fbc6a3a927bb (diff)
hw: arm: allwinner-r40: Add i2c0 device
TWI(i2c) is designed to be used as an interface between CPU host and the serial 2-Wire bus. It can support all standard 2-Wire transfer, can be operated in standard mode(100kbit/s) or fast-mode, supporting data rate up to 400kbit/s. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/arm/allwinner-r40.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/arm/allwinner-r40.h b/include/hw/arm/allwinner-r40.h
index 959b5dc4e0..95366f4eee 100644
--- a/include/hw/arm/allwinner-r40.h
+++ b/include/hw/arm/allwinner-r40.h
@@ -26,6 +26,7 @@
#include "hw/intc/arm_gic.h"
#include "hw/sd/allwinner-sdhost.h"
#include "hw/misc/allwinner-r40-ccu.h"
+#include "hw/i2c/allwinner-i2c.h"
#include "target/arm/cpu.h"
#include "sysemu/block-backend.h"
@@ -48,6 +49,7 @@ enum {
AW_R40_DEV_UART5,
AW_R40_DEV_UART6,
AW_R40_DEV_UART7,
+ AW_R40_DEV_TWI0,
AW_R40_DEV_GIC_DIST,
AW_R40_DEV_GIC_CPU,
AW_R40_DEV_GIC_HYP,
@@ -89,6 +91,7 @@ struct AwR40State {
AwA10PITState timer;
AwSdHostState mmc[AW_R40_NUM_MMCS];
AwR40ClockCtlState ccu;
+ AWI2CState i2c0;
GICState gic;
MemoryRegion sram_a1;
MemoryRegion sram_a2;