aboutsummaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2015-03-19 11:12:21 +0000
committerPeter Maydell <peter.maydell@linaro.org>2015-03-19 11:12:22 +0000
commit2259c16dc21aa55cd3fbc26f9be602949105d249 (patch)
tree52db07bbfdaded22d6bcb0a6032ca7885b612282 /include
parent1f3500976d3d9d77718ba9b0e69cd4e32239ebfc (diff)
parentce394947a75296fc10f1676932473e92aa8be11a (diff)
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pci, virtio bugfixes for 2.3 Just a bunch of bugfixes. Should be nothing remarkable here. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed Mar 18 12:31:03 2015 GMT using RSA key ID D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: pcie_aer: fix comment to match pcie spec pci: fix several trivial typos in comment aer: fix a wrong init PCI_ERR_COR_STATUS w1cmask type register pcie_aer: fix typos in pcie_aer_inject_error comment aer: fix wrong check on expose aer tlp prefix log pcie: correct mistaken register bit for End-End TLP Prefix Blocking virtio: Fix memory leaks reported by Coverity virtio: validate the existence of handle_output before calling it Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/pci/pci.h2
-rw-r--r--include/hw/pci/pcie_aer.h2
-rw-r--r--include/hw/pci/pcie_regs.h2
3 files changed, 3 insertions, 3 deletions
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index be2d9b8703..b97c2956ec 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -137,7 +137,7 @@ enum {
#define PCI_CONFIG_HEADER_SIZE 0x40
/* Size of the standard PCI config space */
#define PCI_CONFIG_SPACE_SIZE 0x100
-/* Size of the standart PCIe config space: 4KB */
+/* Size of the standard PCIe config space: 4KB */
#define PCIE_CONFIG_SPACE_SIZE 0x1000
#define PCI_NUM_PINS 4 /* A-D */
diff --git a/include/hw/pci/pcie_aer.h b/include/hw/pci/pcie_aer.h
index bcac80a7b0..2fb83882be 100644
--- a/include/hw/pci/pcie_aer.h
+++ b/include/hw/pci/pcie_aer.h
@@ -51,7 +51,7 @@ struct PCIEAERLog {
PCIEAERErr *log;
};
-/* aer error message: error signaling message has only error sevirity and
+/* aer error message: error signaling message has only error severity and
source id. See 2.2.8.3 error signaling messages */
struct PCIEAERMsg {
/*
diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h
index 652d9fc58c..848ab1c206 100644
--- a/include/hw/pci/pcie_regs.h
+++ b/include/hw/pci/pcie_regs.h
@@ -72,7 +72,7 @@
#define PCI_EXP_DEVCAP2_EFF 0x100000
#define PCI_EXP_DEVCAP2_EETLPP 0x200000
-#define PCI_EXP_DEVCTL2_EETLPPB 0x80
+#define PCI_EXP_DEVCTL2_EETLPPB 0x8000
/* ARI */
#define PCI_ARI_VER 1