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authorRichard Henderson <richard.henderson@linaro.org>2021-10-29 08:39:44 -0700
committerRichard Henderson <richard.henderson@linaro.org>2021-10-29 08:39:44 -0700
commita92cecba2791cd408d2bca04ce181dc2abaf9695 (patch)
tree1add13b9478f342d6d77015dc78595a4bc84bc76 /include/hw/riscv/virt.h
parentedf044c558acfcf9ccd45ebacb84542dcca2e813 (diff)
parentefd629fb21e2ff6a8f62642d9ed7a23dfee4d320 (diff)
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211028' into staging
Improvements to qemu/int128 Fixes for 128/64 division. Cleanup tcg/optimize.c Optimize redundant sign extensions # gpg: Signature made Thu 28 Oct 2021 09:06:00 PM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * remotes/rth/tags/pull-tcg-20211028: (60 commits) softmmu: fix for "after access" watchpoints softmmu: remove useless condition in watchpoint check softmmu: fix watchpoint processing in icount mode tcg/optimize: Propagate sign info for shifting tcg/optimize: Propagate sign info for bit counting tcg/optimize: Propagate sign info for setcond tcg/optimize: Propagate sign info for logical operations tcg/optimize: Optimize sign extensions tcg/optimize: Use fold_xx_to_i for rem tcg/optimize: Use fold_xi_to_x for div tcg/optimize: Use fold_xi_to_x for mul tcg/optimize: Use fold_xx_to_i for orc tcg/optimize: Stop forcing z_mask to "garbage" for 32-bit values tcg: Extend call args using the correct opcodes tcg/optimize: Sink commutative operand swapping into fold functions tcg/optimize: Expand fold_addsub2_i32 to 64-bit ops tcg/optimize: Expand fold_mulu2_i32 to all 4-arg multiplies tcg/optimize: Split out fold_masks tcg/optimize: Split out fold_ix_to_i tcg/optimize: Split out fold_xi_to_x ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/hw/riscv/virt.h')
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