diff options
author | Christoffer Dall <christoffer.dall@linaro.org> | 2013-11-18 20:32:00 -0800 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2014-02-08 14:47:28 +0000 |
commit | 40d225009efe17cad647b4b7424b77a3ace232f1 (patch) | |
tree | 2d5c2c9a3047af2c9dddde4e8977246c15ba5e56 /include/hw/intc/arm_gic_common.h | |
parent | 8d999995e45c1002aa11f269c98f2e93e6f8c42a (diff) |
arm_gic: Keep track of SGI sources
Right now the arm gic emulation doesn't keep track of the source of an
SGI (which apparently Linux guests don't use, or they're fine with
assuming CPU 0 always).
Add the necessary matrix on the GICState structure and maintain the data
when setting and clearing the pending state of an IRQ and make the state
visible to the guest.
Note that we always choose to present the source as the lowest-numbered
CPU in case multiple cores have signalled the same SGI number to a core
on the system.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/intc/arm_gic_common.h')
-rw-r--r-- | include/hw/intc/arm_gic_common.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_common.h index 8a2aa00cee..d2e0c2f5f1 100644 --- a/include/hw/intc/arm_gic_common.h +++ b/include/hw/intc/arm_gic_common.h @@ -55,6 +55,13 @@ typedef struct GICState { uint8_t priority1[GIC_INTERNAL][GIC_NCPU]; uint8_t priority2[GIC_MAXIRQ - GIC_INTERNAL]; uint16_t last_active[GIC_MAXIRQ][GIC_NCPU]; + /* For each SGI on the target CPU, we store 8 bits + * indicating which source CPUs have made this SGI + * pending on the target CPU. These correspond to + * the bytes in the GIC_SPENDSGIR* registers as + * read by the target CPU. + */ + uint8_t sgi_pending[GIC_NR_SGIS][GIC_NCPU]; uint16_t priority_mask[GIC_NCPU]; uint16_t running_irq[GIC_NCPU]; |