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authorPeter Maydell <peter.maydell@linaro.org>2022-12-14 14:27:12 +0000
committerPeter Maydell <peter.maydell@linaro.org>2022-12-15 11:18:20 +0000
commit1bcb90762b19c96ce1193524f1c8c97ba87e1b17 (patch)
treebd4df6a9a6275b214a51b8cc770b4f85096f8b7e /hw
parent1f6887616f3ca60d8d1e4e33d0a423142afded12 (diff)
hw/intc: Convert TYPE_ARM_GICV3_ITS to 3-phase reset
Convert the TYPE_ARM_GICV3_ITS device to 3-phase reset. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20221109161444.3397405-9-peter.maydell@linaro.org
Diffstat (limited to 'hw')
-rw-r--r--hw/intc/arm_gicv3_its.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index 2ff21ed6bb..57c79da5c5 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -27,7 +27,7 @@ DECLARE_OBJ_CHECKERS(GICv3ITSState, GICv3ITSClass,
struct GICv3ITSClass {
GICv3ITSCommonClass parent_class;
- void (*parent_reset)(DeviceState *dev);
+ ResettablePhases parent_phases;
};
/*
@@ -1953,12 +1953,14 @@ static void gicv3_arm_its_realize(DeviceState *dev, Error **errp)
}
}
-static void gicv3_its_reset(DeviceState *dev)
+static void gicv3_its_reset_hold(Object *obj)
{
- GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);
+ GICv3ITSState *s = ARM_GICV3_ITS_COMMON(obj);
GICv3ITSClass *c = ARM_GICV3_ITS_GET_CLASS(s);
- c->parent_reset(dev);
+ if (c->parent_phases.hold) {
+ c->parent_phases.hold(obj);
+ }
/* Quiescent bit reset to 1 */
s->ctlr = FIELD_DP32(s->ctlr, GITS_CTLR, QUIESCENT, 1);
@@ -2012,12 +2014,14 @@ static Property gicv3_its_props[] = {
static void gicv3_its_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ ResettableClass *rc = RESETTABLE_CLASS(klass);
GICv3ITSClass *ic = ARM_GICV3_ITS_CLASS(klass);
GICv3ITSCommonClass *icc = ARM_GICV3_ITS_COMMON_CLASS(klass);
dc->realize = gicv3_arm_its_realize;
device_class_set_props(dc, gicv3_its_props);
- device_class_set_parent_reset(dc, gicv3_its_reset, &ic->parent_reset);
+ resettable_class_set_parent_phases(rc, NULL, gicv3_its_reset_hold, NULL,
+ &ic->parent_phases);
icc->post_load = gicv3_its_post_load;
}