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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2009-04-09 22:21:07 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2009-04-09 22:21:07 +0000
commitdc828ca1b59b0c390a6994c78e9658174f821f74 (patch)
tree6c2ecf0899c5d699d6056495ad55d89e8cf7d248 /hw
parent7ffa47675c3b0c7ee1deddb1d78bbf5f968f0cb0 (diff)
Cleanup SPARC/TCX framebuffer allocation.
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7059 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r--hw/sun4m.c21
-rw-r--r--hw/sun4m.h3
-rw-r--r--hw/tcx.c8
3 files changed, 16 insertions, 16 deletions
diff --git a/hw/sun4m.c b/hw/sun4m.c
index 9b3bab1de7..a459055704 100644
--- a/hw/sun4m.c
+++ b/hw/sun4m.c
@@ -382,7 +382,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
qemu_irq *esp_reset, *le_reset;
qemu_irq *fdc_tc;
qemu_irq *cpu_halt;
- ram_addr_t ram_offset, prom_offset, tcx_offset, idreg_offset;
+ ram_addr_t ram_offset, prom_offset, idreg_offset;
unsigned long kernel_size;
int ret;
char buf[1024];
@@ -478,9 +478,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
exit (1);
}
- tcx_offset = qemu_ram_alloc(hwdef->vram_size);
- tcx_init(hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
- hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
+ tcx_init(hwdef->tcx_base, hwdef->vram_size, graphic_width, graphic_height,
+ graphic_depth);
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
@@ -1183,7 +1182,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
qemu_irq *cpu_irqs[MAX_CPUS], *sbi_irq, *sbi_cpu_irq,
*espdma_irq, *ledma_irq;
qemu_irq *esp_reset, *le_reset;
- ram_addr_t ram_offset, prom_offset, tcx_offset;
+ ram_addr_t ram_offset, prom_offset;
unsigned long kernel_size;
int ret;
char buf[1024];
@@ -1264,9 +1263,8 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
exit (1);
}
- tcx_offset = qemu_ram_alloc(hwdef->vram_size);
- tcx_init(hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
- hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
+ tcx_init(hwdef->tcx_base, hwdef->vram_size, graphic_width, graphic_height,
+ graphic_depth);
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
@@ -1409,7 +1407,7 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
qemu_irq *cpu_irqs, *slavio_irq, *espdma_irq, *ledma_irq;
qemu_irq *esp_reset, *le_reset;
qemu_irq *fdc_tc;
- ram_addr_t ram_offset, prom_offset, tcx_offset;
+ ram_addr_t ram_offset, prom_offset;
unsigned long kernel_size;
int ret;
char buf[1024];
@@ -1481,9 +1479,8 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
exit (1);
}
- tcx_offset = qemu_ram_alloc(hwdef->vram_size);
- tcx_init(hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
- hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
+ tcx_init(hwdef->tcx_base, hwdef->vram_size, graphic_width, graphic_height,
+ graphic_depth);
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
diff --git a/hw/sun4m.h b/hw/sun4m.h
index 219aaef2ea..726cd18646 100644
--- a/hw/sun4m.h
+++ b/hw/sun4m.h
@@ -24,8 +24,7 @@ static inline void sparc_iommu_memory_write(void *opaque,
}
/* tcx.c */
-void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
- unsigned long vram_offset, int vram_size, int width, int height,
+void tcx_init(target_phys_addr_t addr, int vram_size, int width, int height,
int depth);
/* slavio_intctl.c */
diff --git a/hw/tcx.c b/hw/tcx.c
index 485481589c..4aa4b62ad5 100644
--- a/hw/tcx.c
+++ b/hw/tcx.c
@@ -497,13 +497,17 @@ static CPUWriteMemoryFunc *tcx_dummy_write[3] = {
tcx_dummy_writel,
};
-void tcx_init(target_phys_addr_t addr, uint8_t *vram_base,
- unsigned long vram_offset, int vram_size, int width, int height,
+void tcx_init(target_phys_addr_t addr, int vram_size, int width, int height,
int depth)
{
TCXState *s;
int io_memory, dummy_memory;
+ ram_addr_t vram_offset;
int size;
+ uint8_t *vram_base;
+
+ vram_offset = qemu_ram_alloc(vram_size);
+ vram_base = qemu_get_ram_ptr(vram_offset);
s = qemu_mallocz(sizeof(TCXState));
s->addr = addr;