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authorPeter Maydell <peter.maydell@linaro.org>2021-07-14 12:00:56 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-07-14 12:00:56 +0100
commit4aa2454d94cca99d86aa32e71bd7c8159df91c59 (patch)
tree0dc72fd744dfb906d7c5a98f10e3d0f3d05b634f /hw
parent4598b0735025042c62e85a52e4c91fc0d50ec157 (diff)
parent294aa0437b7f6a3e94653ef661310ef621859c87 (diff)
Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging
x86 queue, 2021-07-13 Bug fixes: * numa: Parse initiator= attribute before cpus= attribute (Michal Privoznik) * Fix CPUID level for AMD (Zhenwei Pi) * Suppress CPUID leaves not defined by the CPU vendor (Michael Roth) Cleanup: * Hyper-V feature handling cleanup (Vitaly Kuznetsov) # gpg: Signature made Tue 13 Jul 2021 17:09:01 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost-gl/tags/x86-next-pull-request: numa: Parse initiator= attribute before cpus= attribute numa: Report expected initiator target/i386: Fix cpuid level for AMD target/i386: suppress CPUID leaves not defined by the CPU vendor i386: Hyper-V SynIC requires POST_MESSAGES/SIGNAL_EVENTS privileges i386: HV_HYPERCALL_AVAILABLE privilege bit is always needed i386: kill off hv_cpuid_check_and_set() i386: expand Hyper-V features during CPU feature expansion time i386: make hyperv_expand_features() return bool i386: hardcode supported eVMCS version to '1' i386: clarify 'hv-passthrough' behavior Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/core/machine.c3
-rw-r--r--hw/core/numa.c45
-rw-r--r--hw/i386/pc.c1
3 files changed, 26 insertions, 23 deletions
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 57c18f909a..6f59fb0b7f 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -728,7 +728,8 @@ void machine_set_cpu_numa_node(MachineState *machine,
if ((numa_info[props->node_id].initiator < MAX_NODES) &&
(props->node_id != numa_info[props->node_id].initiator)) {
error_setg(errp, "The initiator of CPU NUMA node %" PRId64
- " should be itself", props->node_id);
+ " should be itself (got %" PRIu16 ")",
+ props->node_id, numa_info[props->node_id].initiator);
return;
}
numa_info[props->node_id].has_cpu = true;
diff --git a/hw/core/numa.c b/hw/core/numa.c
index 1058d3697b..510d096a88 100644
--- a/hw/core/numa.c
+++ b/hw/core/numa.c
@@ -88,6 +88,29 @@ static void parse_numa_node(MachineState *ms, NumaNodeOptions *node,
return;
}
+ /*
+ * If not set the initiator, set it to MAX_NODES. And if
+ * HMAT is enabled and this node has no cpus, QEMU will raise error.
+ */
+ numa_info[nodenr].initiator = MAX_NODES;
+ if (node->has_initiator) {
+ if (!ms->numa_state->hmat_enabled) {
+ error_setg(errp, "ACPI Heterogeneous Memory Attribute Table "
+ "(HMAT) is disabled, enable it with -machine hmat=on "
+ "before using any of hmat specific options");
+ return;
+ }
+
+ if (node->initiator >= MAX_NODES) {
+ error_report("The initiator id %" PRIu16 " expects an integer "
+ "between 0 and %d", node->initiator,
+ MAX_NODES - 1);
+ return;
+ }
+
+ numa_info[nodenr].initiator = node->initiator;
+ }
+
for (cpus = node->cpus; cpus; cpus = cpus->next) {
CpuInstanceProperties props;
if (cpus->value >= max_cpus) {
@@ -142,28 +165,6 @@ static void parse_numa_node(MachineState *ms, NumaNodeOptions *node,
numa_info[nodenr].node_memdev = MEMORY_BACKEND(o);
}
- /*
- * If not set the initiator, set it to MAX_NODES. And if
- * HMAT is enabled and this node has no cpus, QEMU will raise error.
- */
- numa_info[nodenr].initiator = MAX_NODES;
- if (node->has_initiator) {
- if (!ms->numa_state->hmat_enabled) {
- error_setg(errp, "ACPI Heterogeneous Memory Attribute Table "
- "(HMAT) is disabled, enable it with -machine hmat=on "
- "before using any of hmat specific options");
- return;
- }
-
- if (node->initiator >= MAX_NODES) {
- error_report("The initiator id %" PRIu16 " expects an integer "
- "between 0 and %d", node->initiator,
- MAX_NODES - 1);
- return;
- }
-
- numa_info[nodenr].initiator = node->initiator;
- }
numa_info[nodenr].present = true;
max_numa_nodeid = MAX(max_numa_nodeid, nodenr + 1);
ms->numa_state->num_nodes++;
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 8e1220db72..aa79c5e0e6 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -98,6 +98,7 @@ GlobalProperty pc_compat_6_0[] = {
{ "qemu64" "-" TYPE_X86_CPU, "family", "6" },
{ "qemu64" "-" TYPE_X86_CPU, "model", "6" },
{ "qemu64" "-" TYPE_X86_CPU, "stepping", "3" },
+ { TYPE_X86_CPU, "x-vendor-cpuid-only", "off" },
};
const size_t pc_compat_6_0_len = G_N_ELEMENTS(pc_compat_6_0);