diff options
author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-04 22:47:34 +0000 |
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committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-04 22:47:34 +0000 |
commit | b9dc033c0dea8e1113110a903799c5b31bb2104d (patch) | |
tree | 14e413605893fb66286974ead463bb099ee4c968 /hw | |
parent | 80f515e63688f43b7800027c233ec7139cf3375b (diff) |
USB iso transfers support for the linux redirector and for UHCI, by Arnon Gilboa.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3328 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw')
-rw-r--r-- | hw/usb-uhci.c | 146 |
1 files changed, 118 insertions, 28 deletions
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c index 58674098e4..95dd4a0cd2 100644 --- a/hw/usb-uhci.c +++ b/hw/usb-uhci.c @@ -25,6 +25,7 @@ //#define DEBUG //#define DEBUG_PACKET +//#define DEBUG_ISOCH #define UHCI_CMD_FGR (1 << 4) #define UHCI_CMD_EGSM (1 << 3) @@ -88,6 +89,7 @@ typedef struct UHCIState { other queues will not be processed until the next frame. The solution is to allow multiple pending requests. */ uint32_t async_qh; + uint32_t async_frame_addr; USBPacket usb_packet; uint8_t usb_buf[2048]; } UHCIState; @@ -146,6 +148,58 @@ static void uhci_reset(UHCIState *s) } } +static void uhci_save(QEMUFile *f, void *opaque) +{ + UHCIState *s = opaque; + uint8_t num_ports = NB_PORTS; + int i; + + pci_device_save(&s->dev, f); + + qemu_put_8s(f, &num_ports); + for (i = 0; i < num_ports; ++i) + qemu_put_be16s(f, &s->ports[i].ctrl); + qemu_put_be16s(f, &s->cmd); + qemu_put_be16s(f, &s->status); + qemu_put_be16s(f, &s->intr); + qemu_put_be16s(f, &s->frnum); + qemu_put_be32s(f, &s->fl_base_addr); + qemu_put_8s(f, &s->sof_timing); + qemu_put_8s(f, &s->status2); + qemu_put_timer(f, s->frame_timer); +} + +static int uhci_load(QEMUFile *f, void *opaque, int version_id) +{ + UHCIState *s = opaque; + uint8_t num_ports; + int i, ret; + + if (version_id > 1) + return -EINVAL; + + ret = pci_device_load(&s->dev, f); + if (ret < 0) + return ret; + + qemu_get_8s(f, &num_ports); + if (num_ports != NB_PORTS) + return -EINVAL; + + for (i = 0; i < num_ports; ++i) + qemu_get_be16s(f, &s->ports[i].ctrl); + qemu_get_be16s(f, &s->cmd); + qemu_get_be16s(f, &s->status); + qemu_get_be16s(f, &s->intr); + qemu_get_be16s(f, &s->frnum); + qemu_get_be32s(f, &s->fl_base_addr); + qemu_get_8s(f, &s->sof_timing); + qemu_get_8s(f, &s->status2); + qemu_get_timer(f, s->frame_timer); + + return 0; +} + static void uhci_ioport_writeb(void *opaque, uint32_t addr, uint32_t val) { UHCIState *s = opaque; @@ -449,10 +503,11 @@ static void uhci_async_complete_packet(USBPacket * packet, void *opaque); 0 if TD successful 1 if TD unsuccessful or inactive */ -static int uhci_handle_td(UHCIState *s, UHCI_TD *td, int *int_mask) +static int uhci_handle_td(UHCIState *s, UHCI_TD *td, int *int_mask, + int completion) { uint8_t pid; - int len, max_len, err, ret; + int len = 0, max_len, err, ret = 0; /* ??? This is wrong for async completion. */ if (td->ctrl & TD_CTRL_IOC) { @@ -465,7 +520,8 @@ static int uhci_handle_td(UHCIState *s, UHCI_TD *td, int *int_mask) /* TD is active */ max_len = ((td->token >> 21) + 1) & 0x7ff; pid = td->token & 0xff; - if (s->async_qh) { + + if (completion && (s->async_qh || s->async_frame_addr)) { ret = s->usb_packet.len; if (ret >= 0) { len = ret; @@ -481,7 +537,8 @@ static int uhci_handle_td(UHCIState *s, UHCI_TD *td, int *int_mask) len = 0; } s->async_qh = 0; - } else { + s->async_frame_addr = 0; + } else if (!completion) { s->usb_packet.pid = pid; s->usb_packet.devaddr = (td->token >> 8) & 0x7f; s->usb_packet.devep = (td->token >> 15) & 0xf; @@ -519,6 +576,7 @@ static int uhci_handle_td(UHCIState *s, UHCI_TD *td, int *int_mask) return -1; } } + if (ret == USB_RET_ASYNC) { return 2; } @@ -584,8 +642,42 @@ static void uhci_async_complete_packet(USBPacket * packet, void *opaque) uint32_t link; uint32_t old_td_ctrl; uint32_t val; + uint32_t frame_addr; int ret; + /* Handle async isochronous packet completion */ + frame_addr = s->async_frame_addr; + if (frame_addr) { + cpu_physical_memory_read(frame_addr, (uint8_t *)&link, 4); + le32_to_cpus(&link); + + cpu_physical_memory_read(link & ~0xf, (uint8_t *)&td, sizeof(td)); + le32_to_cpus(&td.link); + le32_to_cpus(&td.ctrl); + le32_to_cpus(&td.token); + le32_to_cpus(&td.buffer); + old_td_ctrl = td.ctrl; + ret = uhci_handle_td(s, &td, &s->pending_int_mask, 1); + + /* update the status bits of the TD */ + if (old_td_ctrl != td.ctrl) { + val = cpu_to_le32(td.ctrl); + cpu_physical_memory_write((link & ~0xf) + 4, + (const uint8_t *)&val, + sizeof(val)); + } + if (ret == 2) { + s->async_frame_addr = frame_addr; + } else if (ret == 0) { + /* update qh element link */ + val = cpu_to_le32(td.link); + cpu_physical_memory_write(frame_addr, + (const uint8_t *)&val, + sizeof(val)); + } + return; + } + link = s->async_qh; if (!link) { /* This should never happen. It means a TD somehow got removed @@ -604,7 +696,8 @@ static void uhci_async_complete_packet(USBPacket * packet, void *opaque) le32_to_cpus(&td.token); le32_to_cpus(&td.buffer); old_td_ctrl = td.ctrl; - ret = uhci_handle_td(s, &td, &s->pending_int_mask); + ret = uhci_handle_td(s, &td, &s->pending_int_mask, 1); + /* update the status bits of the TD */ if (old_td_ctrl != td.ctrl) { val = cpu_to_le32(td.ctrl); @@ -697,7 +790,8 @@ static void uhci_frame_timer(void *opaque) le32_to_cpus(&td.token); le32_to_cpus(&td.buffer); old_td_ctrl = td.ctrl; - ret = uhci_handle_td(s, &td, &int_mask); + ret = uhci_handle_td(s, &td, &int_mask, 0); + /* update the status bits of the TD */ if (old_td_ctrl != td.ctrl) { val = cpu_to_le32(td.ctrl); @@ -731,27 +825,23 @@ static void uhci_frame_timer(void *opaque) le32_to_cpus(&td.ctrl); le32_to_cpus(&td.token); le32_to_cpus(&td.buffer); - /* Ignore isochonous transfers while there is an async packet - pending. This is wrong, but we don't implement isochronous - transfers anyway. */ - if (s->async_qh == 0) { - old_td_ctrl = td.ctrl; - ret = uhci_handle_td(s, &td, &int_mask); - /* update the status bits of the TD */ - if (old_td_ctrl != td.ctrl) { - val = cpu_to_le32(td.ctrl); - cpu_physical_memory_write((link & ~0xf) + 4, - (const uint8_t *)&val, - sizeof(val)); - } - if (ret < 0) - break; /* interrupted frame */ - if (ret == 2) { - /* We can't handle async isochronous transfers. - Cancel The packet. */ - fprintf(stderr, "usb-uhci: Unimplemented async packet\n"); - usb_cancel_packet(&s->usb_packet); - } + + /* Handle isochonous transfer. */ + /* FIXME: might be more than one isoc in frame */ + old_td_ctrl = td.ctrl; + ret = uhci_handle_td(s, &td, &int_mask, 0); + + /* update the status bits of the TD */ + if (old_td_ctrl != td.ctrl) { + val = cpu_to_le32(td.ctrl); + cpu_physical_memory_write((link & ~0xf) + 4, + (const uint8_t *)&val, + sizeof(val)); + } + if (ret < 0) + break; /* interrupted frame */ + if (ret == 2) { + s->async_frame_addr = frame_addr; } link = td.link; } @@ -767,6 +857,7 @@ static void uhci_frame_timer(void *opaque) usb_cancel_packet(&s->usb_packet); s->async_qh = 0; } + /* prepare the timer for the next frame */ expire_time = qemu_get_clock(vm_clock) + (ticks_per_sec / FRAME_TIMER_FREQ); @@ -855,4 +946,3 @@ void usb_uhci_piix4_init(PCIBus *bus, int devfn) pci_register_io_region(&s->dev, 4, 0x20, PCI_ADDRESS_SPACE_IO, uhci_map); } - |