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authorMarcin Juszkiewicz <marcin.juszkiewicz@linaro.org>2023-09-13 16:06:10 +0200
committerPeter Maydell <peter.maydell@linaro.org>2023-09-21 16:07:14 +0100
commit058262e0a8b23b7b45003749efe5246294195324 (patch)
tree93b7088ad961ff9f49d7d2c911946a585e6013f8 /hw
parent07ffc4b90f0c2b4ec13ba804fdffc56d49dff93c (diff)
sbsa-ref: add non-secure EL2 virtual timer
Armv8.1+ cpus have Virtual Host Extension (VHE) which added non-secure EL2 virtual timer. This change adds it to fullfil Arm BSA (Base System Architecture) requirements. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Message-id: 20230913140610.214893-2-marcin.juszkiewicz@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/arm/sbsa-ref.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index bc89eb4806..3c7dfcd6dc 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -61,6 +61,7 @@
#define ARCH_TIMER_S_EL1_IRQ 13
#define ARCH_TIMER_NS_EL1_IRQ 14
#define ARCH_TIMER_NS_EL2_IRQ 10
+#define ARCH_TIMER_NS_EL2_VIRT_IRQ 12
enum {
SBSA_FLASH,
@@ -489,6 +490,7 @@ static void create_gic(SBSAMachineState *sms, MemoryRegion *mem)
[GTIMER_VIRT] = ARCH_TIMER_VIRT_IRQ,
[GTIMER_HYP] = ARCH_TIMER_NS_EL2_IRQ,
[GTIMER_SEC] = ARCH_TIMER_S_EL1_IRQ,
+ [GTIMER_HYPVIRT] = ARCH_TIMER_NS_EL2_VIRT_IRQ,
};
for (irq = 0; irq < ARRAY_SIZE(timer_irq); irq++) {