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authorPeter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>2012-06-13 14:46:50 +1000
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2012-06-15 13:08:13 +0200
commitd85ba787c517308b8a463599ffc3e7e89c3dfbf2 (patch)
tree3a504db2234c291a163e9617c8363aac9371dd3e /hw/xilinx.h
parent07f9fd4864900349d0b3adb2c8403450bade21b7 (diff)
xilinx_axidma: (un)reversed irq initialisation
The axidma irq orders are reversed in both the device model and the instantion. Undid both reversal (for no net change). Also needs to be reversed for consistency with Xilinx tools IRQ listing. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'hw/xilinx.h')
-rw-r--r--hw/xilinx.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/xilinx.h b/hw/xilinx.h
index 35f35bd7fc..70d15cfcf9 100644
--- a/hw/xilinx.h
+++ b/hw/xilinx.h
@@ -81,8 +81,8 @@ xilinx_axiethernetdma_create(void *dmach,
qdev_init_nofail(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
- sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq2);
- sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq);
+ sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
+ sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq2);
return dev;
}