diff options
| author | Xudong Hao <xudong.hao@intel.com> | 2012-10-03 13:46:23 +0000 |
|---|---|---|
| committer | Stefano Stabellini <stefano.stabellini@eu.citrix.com> | 2012-10-03 13:46:23 +0000 |
| commit | aabc8530c7ba2be89e21463f051056ad7c255e6e (patch) | |
| tree | 9172a61efa153e918ab7aad3ba7fb28194c30ddc /hw/xen_pt.c | |
| parent | bd4982a6c6f1b133aff38873bc3b580af15cd334 (diff) | |
qemu/xen: Add 64 bits big bar support on qemu
Currently it is assumed PCI device BAR access < 4G memory. If there is such a
device whose BAR size is larger than 4G, it must access > 4G memory address.
This patch enable the 64bits big BAR support on qemu.
Signed-off-by: Xudong Hao <xudong.hao@intel.com>
Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Diffstat (limited to 'hw/xen_pt.c')
| -rw-r--r-- | hw/xen_pt.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/hw/xen_pt.c b/hw/xen_pt.c index 307119a12f..838bcea4d6 100644 --- a/hw/xen_pt.c +++ b/hw/xen_pt.c @@ -410,14 +410,17 @@ static int xen_pt_register_regions(XenPCIPassthroughState *s) if (r->type & XEN_HOST_PCI_REGION_TYPE_PREFETCH) { type |= PCI_BASE_ADDRESS_MEM_PREFETCH; } + if (r->type & XEN_HOST_PCI_REGION_TYPE_MEM_64) { + type |= PCI_BASE_ADDRESS_MEM_TYPE_64; + } } memory_region_init_io(&s->bar[i], &ops, &s->dev, "xen-pci-pt-bar", r->size); pci_register_bar(&s->dev, i, type, &s->bar[i]); - XEN_PT_LOG(&s->dev, "IO region %i registered (size=0x%08"PRIx64 - " base_addr=0x%08"PRIx64" type: %#x)\n", + XEN_PT_LOG(&s->dev, "IO region %i registered (size=0x%lx"PRIx64 + " base_addr=0x%lx"PRIx64" type: %#x)\n", i, r->size, r->base_addr, type); } |