diff options
| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-08-05 17:47:16 +0000 |
|---|---|---|
| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-08-05 17:47:16 +0000 |
| commit | 1569fc29ef60fa1972115860b420fb40d238fac5 (patch) | |
| tree | c26d7d9579d8930013df7d33e7590c530ab0314c /hw/slavio_intctl.c | |
| parent | 36cbaae5cc21fbd0a12fbb256e941c485bcf0ced (diff) | |
Fix Slavio interrupt controller debugging output
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3112 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/slavio_intctl.c')
| -rw-r--r-- | hw/slavio_intctl.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c index 9550c0064f..993c3196c8 100644 --- a/hw/slavio_intctl.c +++ b/hw/slavio_intctl.c @@ -84,7 +84,7 @@ static uint32_t slavio_intctl_mem_readl(void *opaque, target_phys_addr_t addr) ret = 0; break; } - DPRINTF("read cpu %d reg 0x%x = %x\n", addr, ret); + DPRINTF("read cpu %d reg 0x" TARGET_FMT_plx " = %x\n", cpu, addr, ret); return ret; } @@ -97,7 +97,7 @@ static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr, uint cpu = (addr & (MAX_CPUS - 1) * TARGET_PAGE_SIZE) >> 12; saddr = (addr & INTCTL_MAXADDR) >> 2; - DPRINTF("write cpu %d reg 0x%x = %x\n", cpu, addr, val); + DPRINTF("write cpu %d reg 0x" TARGET_FMT_plx " = %x\n", cpu, addr, val); switch (saddr) { case 1: // clear pending softints if (val & 0x4000) @@ -151,7 +151,7 @@ static uint32_t slavio_intctlm_mem_readl(void *opaque, target_phys_addr_t addr) ret = 0; break; } - DPRINTF("read system reg 0x%x = %x\n", addr, ret); + DPRINTF("read system reg 0x" TARGET_FMT_plx " = %x\n", addr, ret); return ret; } @@ -162,7 +162,7 @@ static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr, uin uint32_t saddr; saddr = (addr & INTCTLM_MASK) >> 2; - DPRINTF("write system reg 0x%x = %x\n", addr, val); + DPRINTF("write system reg 0x" TARGET_FMT_plx " = %x\n", addr, val); switch (saddr) { case 2: // clear (enable) // Force clear unused bits |