diff options
| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2015-11-11 22:49:51 +0000 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2015-11-12 13:15:55 +1100 |
| commit | cffc331a3156870d54883bc79e4278472ffd8f1d (patch) | |
| tree | 2c810060b2565b6d5444d8a4758f93c24ad36ad0 /hw/ppc | |
| parent | a53cfdcca2834ec7e61fd955c4f24ac233c4ec16 (diff) | |
cuda.c: add delay to setting of SR_INT bit
MacOS 9 is racy when it comes to accessing the shift register. Fix this by
introducing a small delay between data accesses and raising the SR_INT
interrupt bit.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc')
| -rw-r--r-- | hw/ppc/mac.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h index 8bdba30c1e..e375ed2b2b 100644 --- a/hw/ppc/mac.h +++ b/hw/ppc/mac.h @@ -103,6 +103,9 @@ typedef struct CUDAState { uint8_t last_b; uint8_t last_acr; + /* MacOS 9 is racy and requires a delay upon setting the SR_INT bit */ + QEMUTimer *sr_delay_timer; + int data_in_size; int data_in_index; int data_out_index; |