diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2017-07-14 09:36:40 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2017-07-14 09:36:40 +0100 |
| commit | a309b290aaa8ac55191a50e44bbd99b5fc586487 (patch) | |
| tree | 3798999e5f6d795f6987dcedb7c396fdd3011fa0 /hw/ppc/pnv.c | |
| parent | 49bcce4b9c11759678fd223aefb48691c4959d4f (diff) | |
| parent | 88f83f3539fdedd5f315c5fe434ffcb7a010cc73 (diff) | |
Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2017-07-13' into staging
Error reporting patches for 2017-07-13
# gpg: Signature made Thu 13 Jul 2017 12:55:45 BST
# gpg: using RSA key 0x3870B400EB918653
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>"
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>"
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-error-2017-07-13:
Convert error_report*_err() to warn_report*_err()
error: Implement the warn and free Error functions
char-socket: Report TCP socket waiting as information
Convert error_report() to warn_report()
error: Functions to report warnings and informational messages
util/qemu-error: Rename error_print_loc() to be more generic
websock: Don't try to set *errp directly
block: Don't try to set *errp directly
xilinx: Fix latent error handling bug
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ppc/pnv.c')
| -rw-r--r-- | hw/ppc/pnv.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index a4cd733cba..47221158d4 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -160,13 +160,13 @@ static void powernv_create_core_node(PnvChip *chip, PnvCore *pc, void *fdt) _FDT((fdt_setprop_cell(fdt, offset, "d-cache-size", pcc->l1_dcache_size))); } else { - error_report("Warning: Unknown L1 dcache size for cpu"); + warn_report("Unknown L1 dcache size for cpu"); } if (pcc->l1_icache_size) { _FDT((fdt_setprop_cell(fdt, offset, "i-cache-size", pcc->l1_icache_size))); } else { - error_report("Warning: Unknown L1 icache size for cpu"); + warn_report("Unknown L1 icache size for cpu"); } _FDT((fdt_setprop_cell(fdt, offset, "timebase-frequency", tbfreq))); @@ -556,7 +556,7 @@ static void ppc_powernv_init(MachineState *machine) /* allocate RAM */ if (machine->ram_size < (1 * G_BYTE)) { - error_report("Warning: skiboot may not work with < 1GB of RAM"); + warn_report("skiboot may not work with < 1GB of RAM"); } ram = g_new(MemoryRegion, 1); |