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authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2018-09-08 10:08:18 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2018-09-25 11:12:25 +1000
commit55a2290254192d828b9464acb175fb0dc24c7035 (patch)
treed78539c67f3474f936d92ea42881abf2f3c32b9e /hw/pci-host
parent8e93b2c3930b635032739ed3d944f72ac2ae6355 (diff)
raven: some minor IRQ-related tidy-ups
This really lays the groundwork for the upcoming patches: it renames the irqs PREPPCIState struct member to pci_irqs (as soon there will be a distinction) and then changes the raven IRQ opaque to use PREPPCIState instead of just irqs array. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Tested-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/pci-host')
-rw-r--r--hw/pci-host/prep.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c
index 88f035c20b..9b36f19c97 100644
--- a/hw/pci-host/prep.c
+++ b/hw/pci-host/prep.c
@@ -55,7 +55,7 @@ typedef struct RavenPCIState {
typedef struct PRePPCIState {
PCIHostState parent_obj;
- qemu_irq irq[PCI_NUM_PINS];
+ qemu_irq pci_irqs[PCI_NUM_PINS];
PCIBus pci_bus;
AddressSpace pci_io_as;
MemoryRegion pci_io;
@@ -194,9 +194,9 @@ static int raven_map_irq(PCIDevice *pci_dev, int irq_num)
static void raven_set_irq(void *opaque, int irq_num, int level)
{
- qemu_irq *pic = opaque;
+ PREPPCIState *s = opaque;
- qemu_set_irq(pic[irq_num] , level);
+ qemu_set_irq(s->pci_irqs[irq_num], level);
}
static AddressSpace *raven_pcihost_set_iommu(PCIBus *bus, void *opaque,
@@ -223,13 +223,12 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp)
int i;
for (i = 0; i < PCI_NUM_PINS; i++) {
- sysbus_init_irq(dev, &s->irq[i]);
+ sysbus_init_irq(dev, &s->pci_irqs[i]);
}
qdev_init_gpio_in(d, raven_change_gpio, 1);
- pci_bus_irqs(&s->pci_bus, raven_set_irq, raven_map_irq, s->irq,
- PCI_NUM_PINS);
+ pci_bus_irqs(&s->pci_bus, raven_set_irq, raven_map_irq, s, PCI_NUM_PINS);
memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, s,
"pci-conf-idx", 4);