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authorMarkus Armbruster <armbru@redhat.com>2020-06-10 07:32:00 +0200
committerMarkus Armbruster <armbru@redhat.com>2020-06-15 22:05:08 +0200
commit99ba777e53ebf31bf24e7a52a21fccdd25f95537 (patch)
treefccf54cfa20d5a8bd534334bb6d77b1c5fcff5b7 /hw/pci-host
parentdf70796916ebbafe262a01c1c4dc6d7af805de24 (diff)
qdev: Convert uses of qdev_set_parent_bus() with Coccinelle
In addition to the qdev_create() patterns converted so far, we have a qdev_set_parent_bus() pattern. Mostly when we embed a device in a parent device rather than allocating it on the heap. This pattern also puts devices in the dangerous "no QOM parent, but plugged into bus" state I explained in recent commit "qdev: New qdev_new(), qdev_realize(), etc." Apply same solution: convert to qdev_realize(). Coccinelle script: @@ expression dev, bus, errp; symbol true; @@ - qdev_set_parent_bus(DEVICE(dev), bus); ... - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize(DEVICE(dev), bus, errp); @ depends on !(file in "qdev-monitor.c") && !(file in "hw/core/qdev.c")@ expression dev, bus, errp; symbol true; @@ - qdev_set_parent_bus(dev, bus); ... - object_property_set_bool(OBJECT(dev), true, "realized", errp); + qdev_realize(dev, bus, errp); @@ expression dev, bus; symbol true; @@ - qdev_set_parent_bus(DEVICE(dev), bus); ... - qdev_init_nofail(DEVICE(dev)); + qdev_realize(DEVICE(dev), bus, &error_fatal); Unconverted uses of qdev_set_parent_bus() remain. They'll be converted later in this series. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200610053247.1583243-12-armbru@redhat.com> [Also convert new hw/virtio/vhost-user-vsock-pci.c]
Diffstat (limited to 'hw/pci-host')
-rw-r--r--hw/pci-host/designware.c3
-rw-r--r--hw/pci-host/gpex.c3
-rw-r--r--hw/pci-host/pnv_phb3.c3
-rw-r--r--hw/pci-host/pnv_phb4.c3
-rw-r--r--hw/pci-host/q35.c3
-rw-r--r--hw/pci-host/versatile.c3
-rw-r--r--hw/pci-host/xilinx-pcie.c3
7 files changed, 7 insertions, 14 deletions
diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c
index dd245516dd..2e97d6b17f 100644
--- a/hw/pci-host/designware.c
+++ b/hw/pci-host/designware.c
@@ -688,8 +688,7 @@ static void designware_pcie_host_realize(DeviceState *dev, Error **errp)
"pcie-bus-address-space");
pci_setup_iommu(pci->bus, designware_pcie_host_set_iommu, s);
- qdev_set_parent_bus(DEVICE(&s->root), BUS(pci->bus));
- qdev_init_nofail(DEVICE(&s->root));
+ qdev_realize(DEVICE(&s->root), BUS(pci->bus), &error_fatal);
}
static const VMStateDescription vmstate_designware_pcie_host = {
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
index 0ca604dc62..3dfb3bf599 100644
--- a/hw/pci-host/gpex.c
+++ b/hw/pci-host/gpex.c
@@ -98,9 +98,8 @@ static void gpex_host_realize(DeviceState *dev, Error **errp)
pci_swizzle_map_irq_fn, s, &s->io_mmio,
&s->io_ioport, 0, 4, TYPE_PCIE_BUS);
- qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus));
pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq);
- qdev_init_nofail(DEVICE(&s->gpex_root));
+ qdev_realize(DEVICE(&s->gpex_root), BUS(pci->bus), &error_fatal);
}
static const char *gpex_host_root_bus_path(PCIHostState *host_bridge,
diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
index 74618fadf0..8dcfe4a2fd 100644
--- a/hw/pci-host/pnv_phb3.c
+++ b/hw/pci-host/pnv_phb3.c
@@ -1064,8 +1064,7 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
/* Add a single Root port */
qdev_prop_set_uint8(DEVICE(&phb->root), "chassis", phb->chip_id);
qdev_prop_set_uint16(DEVICE(&phb->root), "slot", phb->phb_id);
- qdev_set_parent_bus(DEVICE(&phb->root), BUS(pci->bus));
- qdev_init_nofail(DEVICE(&phb->root));
+ qdev_realize(DEVICE(&phb->root), BUS(pci->bus), &error_fatal);
}
void pnv_phb3_update_regions(PnvPHB3 *phb)
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index 23cf093928..e30ae9ad5b 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -1210,8 +1210,7 @@ static void pnv_phb4_realize(DeviceState *dev, Error **errp)
/* Add a single Root port */
qdev_prop_set_uint8(DEVICE(&phb->root), "chassis", phb->chip_id);
qdev_prop_set_uint16(DEVICE(&phb->root), "slot", phb->phb_id);
- qdev_set_parent_bus(DEVICE(&phb->root), BUS(pci->bus));
- qdev_init_nofail(DEVICE(&phb->root));
+ qdev_realize(DEVICE(&phb->root), BUS(pci->bus), &error_fatal);
/* Setup XIVE Source */
if (phb->big_phb) {
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index b788f17b2c..43ed5188cc 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -64,8 +64,7 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
s->mch.address_space_io,
0, TYPE_PCIE_BUS);
PC_MACHINE(qdev_get_machine())->bus = pci->bus;
- qdev_set_parent_bus(DEVICE(&s->mch), BUS(pci->bus));
- qdev_init_nofail(DEVICE(&s->mch));
+ qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal);
}
static const char *q35_host_root_bus_path(PCIHostState *host_bridge,
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index ea7390c6fa..616882a80d 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -409,7 +409,6 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
h->bus = &s->pci_bus;
object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_VERSATILE_PCI_HOST);
- qdev_set_parent_bus(DEVICE(&s->pci_dev), BUS(&s->pci_bus));
for (i = 0; i < 4; i++) {
sysbus_init_irq(sbd, &s->irq[i]);
@@ -459,7 +458,7 @@ static void pci_vpb_realize(DeviceState *dev, Error **errp)
}
/* TODO Remove once realize propagates to child devices. */
- object_property_set_bool(OBJECT(&s->pci_dev), true, "realized", errp);
+ qdev_realize(DEVICE(&s->pci_dev), BUS(&s->pci_bus), errp);
}
static void versatile_pci_host_realize(PCIDevice *d, Error **errp)
diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
index e06f2b59cf..e4fc8abb6a 100644
--- a/hw/pci-host/xilinx-pcie.c
+++ b/hw/pci-host/xilinx-pcie.c
@@ -137,8 +137,7 @@ static void xilinx_pcie_host_realize(DeviceState *dev, Error **errp)
pci_swizzle_map_irq_fn, s, &s->mmio,
&s->io, 0, 4, TYPE_PCIE_BUS);
- qdev_set_parent_bus(DEVICE(&s->root), BUS(pci->bus));
- qdev_init_nofail(DEVICE(&s->root));
+ qdev_realize(DEVICE(&s->root), BUS(pci->bus), &error_fatal);
}
static const char *xilinx_pcie_host_root_bus_path(PCIHostState *host_bridge,