aboutsummaryrefslogtreecommitdiff
path: root/hw/pc.c
diff options
context:
space:
mode:
authorBlue Swirl <blauwirbel@gmail.com>2010-06-19 10:42:34 +0300
committerBlue Swirl <blauwirbel@gmail.com>2010-06-19 10:42:34 +0300
commit0e26b7b892e1369d66da63b748acbfb6b3819a59 (patch)
tree4a67dca5b6529bebac524e757f99eb987dd0c653 /hw/pc.c
parent4a942ceac7e38c259116960e45ba9619611d1df9 (diff)
apic: avoid using CPUState internals
Move the actual CPUState contents handling to cpu.h and cpuid.c. Handle CPU reset and set env->halted in pc.c. Add a function to get the local APIC state of the current CPU for the MMIO. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/pc.c')
-rw-r--r--hw/pc.c34
1 files changed, 32 insertions, 2 deletions
diff --git a/hw/pc.c b/hw/pc.c
index 4263ca9b8f..bec1a88b85 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -754,6 +754,15 @@ int cpu_is_bsp(CPUState *env)
return env->cpu_index == 0;
}
+APICState *cpu_get_current_apic(void)
+{
+ if (cpu_single_env) {
+ return cpu_single_env->apic_state;
+ } else {
+ return NULL;
+ }
+}
+
/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
BIOS will read it and start S3 resume at POST Entry */
void pc_cmos_set_s3_resume(void *opaque, int irq, int level)
@@ -774,6 +783,22 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
}
}
+static void bsp_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_reset(env);
+ env->halted = 0;
+}
+
+static void ap_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_reset(env);
+ env->halted = 1;
+}
+
static CPUState *pc_new_cpu(const char *cpu_model)
{
CPUState *env;
@@ -786,9 +811,14 @@ static CPUState *pc_new_cpu(const char *cpu_model)
if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
env->cpuid_apic_id = env->cpu_index;
/* APIC reset callback resets cpu */
- apic_init(env);
+ env->apic_state = apic_init(env, env->cpuid_apic_id);
+ }
+ if (cpu_is_bsp(env)) {
+ qemu_register_reset(bsp_cpu_reset, env);
+ env->halted = 0;
} else {
- qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
+ qemu_register_reset(ap_cpu_reset, env);
+ env->halted = 1;
}
return env;
}