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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-01 18:59:50 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-01 18:59:50 +0000
commit8da3ff180974732fc4272cb4433fef85c1822961 (patch)
treef23cfaffa61efb36aa46dfeb771ad33cbfd4f3aa /hw/parallel.c
parent6ad1d22b15c0a091edb1d8efc983c1d75f74ef45 (diff)
Change MMIO callbacks to use offsets, not absolute addresses.
Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5849 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/parallel.c')
-rw-r--r--hw/parallel.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/hw/parallel.c b/hw/parallel.c
index 66bc715fa4..025067af6f 100644
--- a/hw/parallel.c
+++ b/hw/parallel.c
@@ -75,7 +75,6 @@ struct ParallelState {
int epp_timeout;
uint32_t last_read_offset; /* For debugging */
/* Memory-mapped interface */
- target_phys_addr_t base;
int it_shift;
};
@@ -477,7 +476,7 @@ static uint32_t parallel_mm_readb (void *opaque, target_phys_addr_t addr)
{
ParallelState *s = opaque;
- return parallel_ioport_read_sw(s, (addr - s->base) >> s->it_shift) & 0xFF;
+ return parallel_ioport_read_sw(s, addr >> s->it_shift) & 0xFF;
}
static void parallel_mm_writeb (void *opaque,
@@ -485,14 +484,14 @@ static void parallel_mm_writeb (void *opaque,
{
ParallelState *s = opaque;
- parallel_ioport_write_sw(s, (addr - s->base) >> s->it_shift, value & 0xFF);
+ parallel_ioport_write_sw(s, addr >> s->it_shift, value & 0xFF);
}
static uint32_t parallel_mm_readw (void *opaque, target_phys_addr_t addr)
{
ParallelState *s = opaque;
- return parallel_ioport_read_sw(s, (addr - s->base) >> s->it_shift) & 0xFFFF;
+ return parallel_ioport_read_sw(s, addr >> s->it_shift) & 0xFFFF;
}
static void parallel_mm_writew (void *opaque,
@@ -500,14 +499,14 @@ static void parallel_mm_writew (void *opaque,
{
ParallelState *s = opaque;
- parallel_ioport_write_sw(s, (addr - s->base) >> s->it_shift, value & 0xFFFF);
+ parallel_ioport_write_sw(s, addr >> s->it_shift, value & 0xFFFF);
}
static uint32_t parallel_mm_readl (void *opaque, target_phys_addr_t addr)
{
ParallelState *s = opaque;
- return parallel_ioport_read_sw(s, (addr - s->base) >> s->it_shift);
+ return parallel_ioport_read_sw(s, addr >> s->it_shift);
}
static void parallel_mm_writel (void *opaque,
@@ -515,7 +514,7 @@ static void parallel_mm_writel (void *opaque,
{
ParallelState *s = opaque;
- parallel_ioport_write_sw(s, (addr - s->base) >> s->it_shift, value);
+ parallel_ioport_write_sw(s, addr >> s->it_shift, value);
}
static CPUReadMemoryFunc *parallel_mm_read_sw[] = {
@@ -540,7 +539,6 @@ ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq
if (!s)
return NULL;
parallel_reset(s, irq, chr);
- s->base = base;
s->it_shift = it_shift;
io_sw = cpu_register_io_memory(0, parallel_mm_read_sw, parallel_mm_write_sw, s);