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authorPeter Crosthwaite <crosthwaitepeter@gmail.com>2016-03-04 11:30:21 +0000
committerPeter Maydell <peter.maydell@linaro.org>2016-03-04 11:30:21 +0000
commit7ef295ea5b412cbaf82f719ccd49efb51296e841 (patch)
treeda99e5270fcf99285c0b5dfb787c4b304687843a /hw/openrisc
parent140b7ce5fff6fc660b2484dfd9d33ed2e42ec5a9 (diff)
loader: Add data swap option to load-elf
Some CPUs are of an opposite data-endianness to other components in the system. Sometimes elfs have the data sections layed out with this CPU data-endianness accounting for when loaded via the CPU, so byte swaps (relative to other system components) will occur. The leading example, is ARM's BE32 mode, which is is basically LE with address manipulation on half-word and byte accesses to access the hw/byte reversed address. This means that word data is invariant across LE and BE32. This also means that instructions are still LE. The expectation is that the elf will be loaded via the CPU in this endianness scheme, which means the data in the elf is reversed at compile time. As QEMU loads via the system memory directly, rather than the CPU, we need a mechanism to reverse elf data endianness to implement this possibility. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/openrisc')
-rw-r--r--hw/openrisc/openrisc_sim.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 25c637aba7..46418c30f7 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -69,7 +69,8 @@ static void cpu_openrisc_load_kernel(ram_addr_t ram_size,
if (kernel_filename && !qtest_enabled()) {
kernel_size = load_elf(kernel_filename, NULL, NULL,
- &elf_entry, NULL, NULL, 1, EM_OPENRISC, 1);
+ &elf_entry, NULL, NULL, 1, EM_OPENRISC,
+ 1, 0);
entry = elf_entry;
if (kernel_size < 0) {
kernel_size = load_uimage(kernel_filename,