diff options
author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-06-17 13:53:27 +0200 |
---|---|---|
committer | Corey Minyard <cminyard@mvista.com> | 2021-07-08 14:15:01 -0500 |
commit | 80675e193c2b99f148528be47b1ced86ac70ddbe (patch) | |
tree | 4153a5d6dcbd80c4704a81f0795986447e67e4df /hw/misc/auxbus.c | |
parent | eb8377386d5b5ca3a844b87b5cbe1a6214f86c20 (diff) |
hw/misc/auxbus: Explode READ_I2C / WRITE_I2C_MOT cases
To allow further simplifications in the following commits,
start copying WRITE_I2C code to the READ_I2C, and READ_I2C_MOT
to WRITE_I2C_MOT. No logical change.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Corey Minyard <cminyard@mvista.com>
Diffstat (limited to 'hw/misc/auxbus.c')
-rw-r--r-- | hw/misc/auxbus.c | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/hw/misc/auxbus.c b/hw/misc/auxbus.c index 148b070ce4..9cc9cf3be3 100644 --- a/hw/misc/auxbus.c +++ b/hw/misc/auxbus.c @@ -133,6 +133,26 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address, * Classic I2C transactions.. */ case READ_I2C: + is_write = cmd == READ_I2C ? false : true; + if (i2c_bus_busy(i2c_bus)) { + i2c_end_transfer(i2c_bus); + } + + if (i2c_start_transfer(i2c_bus, address, !is_write)) { + ret = AUX_I2C_NACK; + break; + } + + ret = AUX_I2C_ACK; + while (len > 0) { + if (i2c_send_recv(i2c_bus, data++, is_write) < 0) { + ret = AUX_I2C_NACK; + break; + } + len--; + } + i2c_end_transfer(i2c_bus); + break; case WRITE_I2C: is_write = cmd == READ_I2C ? false : true; if (i2c_bus_busy(i2c_bus)) { @@ -163,6 +183,39 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address, * - We changed the address. */ case WRITE_I2C_MOT: + is_write = cmd == READ_I2C_MOT ? false : true; + ret = AUX_I2C_NACK; + if (!i2c_bus_busy(i2c_bus)) { + /* + * No transactions started.. + */ + if (i2c_start_transfer(i2c_bus, address, !is_write)) { + break; + } + } else if ((address != bus->last_i2c_address) || + (bus->last_transaction != cmd)) { + /* + * Transaction started but we need to restart.. + */ + i2c_end_transfer(i2c_bus); + if (i2c_start_transfer(i2c_bus, address, !is_write)) { + break; + } + } + + bus->last_transaction = cmd; + bus->last_i2c_address = address; + while (len > 0) { + if (i2c_send_recv(i2c_bus, data++, is_write) < 0) { + i2c_end_transfer(i2c_bus); + break; + } + len--; + } + if (len == 0) { + ret = AUX_I2C_ACK; + } + break; case READ_I2C_MOT: is_write = cmd == READ_I2C_MOT ? false : true; ret = AUX_I2C_NACK; |